PIC16C717-I/SS View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
PIC16C717-I/SS Datasheet PDF : 200 Pages
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PIC16C717/770/771
REGISTER 11-2: A/D CONTROL REGISTER 1 (ADCON1: 9Fh)
R/W-0
ADFM
bit7
R/W-0
VCFG2
R/W-0 R/W-0 R/W-0
VCFG1 VCFG0
R/W-0 R/W-0
Reserved
bit 7:
bit 6-4:
ADFM: A/D Result Format Select bit
1 = Right justified
0 = Left justified
VCFG<2:0>: Voltage reference configuration bits
A/D VREF+
000
AVDD
A/D VREF-
AVSS
001 External VREF+
External VREF-
010
Internal VRH
Internal VRL
011 External VREF+
AVSS
100
Internal VRH
AVSS
101
AVDD
110
AVDD
External VREF-
Internal VRL
111
Internal VRL
AVSS
R/W-0
bit 0
R=
W=
U=
-n=
Readable bit
Writable bit
Unimplemented bit, read as ‘0’
Value at POR reset
bit 3-0: Reserved: Do not use.
The value that is in the ADRESH and ADRESL regis-
ters are not modified for a Power-on Reset. The
ADRESH and ADRESL registers will contain unknown
data after a Power-on Reset.
The A/D conversion results can be left justified (ADFM
bit cleared), or right justified (ADFM bit set).
Figure 11-1 through Figure 11-2 show the A/D result
data format of the PIC16C717/770/771.
FIGURE 11-1: PIC16C770/771 12-BIT A/D RESULT FORMATS
ADRESH (1Eh)
Left Justified
(ADFM = 0)
MSB
bit7
bit7
ADRESL (9Eh)
LSB
12-bit A/D Result
Unused
Right Justified
(ADFM = 1)
MSB
LSB
bit7
bit7
Unused
12-bit A/D Result
© 1999 Microchip Technology Inc.
Advanced Information
DS41120A-page 115
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