PIC16C717-I/SS View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC16C717-I/SS

18/20-Pin, 8-Bit CMOS Microcontrollers with 10/12-Bit A/D

Microchip Technology 

PIC16C717/770/771

11.6 A/D Sample Requirements

11.6.1 RECOMMENDED SOURCE IMPEDANCE

The maximum recommended impedance for ana-

log sources is 2.5 kΩ. This value is calculated based

on the maximum leakage current of the input pin. The

leakage current is 100 nA max., and the analog input

voltage cannot be varied by more than 1/4 LSb or

250 µV due to leakage. This places a requirement on

the input impedance of 250 µV/100 nA = 2.5 kΩ.

11.6.2 SAMPLING TIME CALCULATION

For the A/D converter to meet its specified accuracy,

the charge holding capacitor (CHOLD) must be allowed

to fully charge to the input channel voltage level. The

analog input model is shown in Figure 11-5. The

source impedance (RS) and the internal sampling

switch (RSS) impedance directly affect the time

required to charge the capacitor CHOLD. The sampling

switch (RSS) impedance varies over the device voltage

(VDD), see Figure 11-5. The maximum recom-

mended impedance for analog sources is 2.5 kΩ .

After the analog input channel is selected (changed)

this sampling must be done before the conversion can

be started.

To calculate the minimum sampling time, Equation 11-

2 may be used. This equation assumes that 1/4 LSb

error is used (16384 steps for the A/D). The 1/4 LSb

error is the maximum error allowed for the A/D to meet

its specified resolution.

The CHOLD is assumed to be 25 pF for the 12-bit

A/D.

EXAMPLE 11-2: A/D SAMPLING TIME EQUATION

VHOLD =(VREF - VREF/16384) = (VREF) • (1 -e (-TC/C (RIC +RSS + RS)) VREF(1 - 1/16384) = VREF • (1 -e (-TC/C (RIC +RSS + RS))

Tc = -CHOLD (1kΩ + RSS + RS) In (1/16384)

Figure 11-3 shows the calculation of the minimum time

required to charge CHOLD. This calculation is based on

the following system assumptions:

CHOLD = 25 pF

RS = 2.5 kΩ

1/4 LSb error

VDD = 5V → RSS = 10 kΩ (worst case)

Temp (system Max.) = 50°C

Note 1: The reference voltage (VREF) has no

effect on the equation, since it cancels

itself out.

2: The charge holding capacitor (CHOLD) is

not discharged after each conversion.

3: The maximum recommended impedance

for analog sources is 2.5 kΩ . This is

required to meet the pin leakage specifi-

cation.

4: After a conversion has completed, you

must wait 2 TAD time before sampling can

begin again. During this time, the holding

capacitor is not connected to the selected

A/D input channel.

© 1999 Microchip Technology Inc.

Advanced Information

DS41120A-page 121

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