PIC16C717/770/771
EXAMPLE 11-3: CALCULATING THE MINIMUM
REQUIRED SAMPLE TIME
TACQ =
TACQ =
Amplifier Settling Time
+ Holding Capacitor Charging Time
+Temperature offset †
5 µs
+ TC
+ [(Temp - 25°C)(0.05 µs/°C)] †
TC =
TC =
TC =
TC =
TC =
TC =
Holding Capacitor Charging Time
(CHOLD) (RIC + RSS + RS) In (1/16384)
-25 pF (1 kΩ +10 kΩ + 2.5 kΩ) In (1/16384)
-25 pF (13.5 kΩ) In (1/16384)
-0.338 (-9.704)µs
3.3µs
TACQ =
5 µs
+ 3.3 µs
+ [(50°C - 25°C)(0.05 µs / °C)]
TACQ =
TACQ =
8.3 µs + 1.25 µs
9.55 µs
† The temperature coefficient is only required for
temperatures > 25°C.
FIGURE 11-5: ANALOG INPUT MODEL
Rs Port Pin
VDD
VT = 0.6V
RIC ≅ 1k
Sampling
Switch
SS RSS
VA
CPIN
5 pF
VT = 0.6V
ILEAKAGE
± 100 nA
CHOLD = 25 pF
VSS
Legend CPIN
= input capacitance
VT
= threshold voltage
ILEAKAGE = leakage current at the pin due to
various junctions
RIC
SS
CHOLD
= interconnect resistance
= sampling switch
= sample/hold capacitance (from DAC)
6V
5V
VDD 4V
3V
2V
5 6 7 8 9 10 11
Sampling Switch (RSS)
( kΩ )
DS41120A-page 122
Advanced Information
© 1999 Microchip Technology Inc.