PIC16LC717T-I/SO View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
PIC16LC717T-I/SO Datasheet PDF : 200 Pages
| |||
PIC16C717/770/771
Prescaler, Timer2................................................................ 59
Select (T2CKPS Bits).................................................. 53
PRO MATE® II Universal Programmer............................. 151
Program .............................................................................. 43
Program Counter
PCL Register............................................................... 24
PCLATH Register ............................................... 24, 136
Reset Conditions....................................................... 131
Program Memory ................................................................ 11
Interrupt Vector ........................................................... 11
Paging ................................................................... 11, 24
Program Memory Map ................................................ 11
Reset Vector ............................................................... 11
Program Verification.......................................................... 139
Programmable Brown-out Reset (PBOR) ................. 129, 130
Programming, Device Instructions .................................... 141
PWM (CCP Module)............................................................ 58
Block Diagram............................................................. 58
CCPR1H:CCPR1L Registers ...................................... 58
Duty Cycle................................................................... 59
Output Diagram........................................................... 59
Period.......................................................................... 58
TMR2 to PR2 Match ............................................. 53, 58
TMR2 to PR2 Match Enable (TMR2IE Bit) ................. 19
Q
Q-Clock ............................................................................... 59
R
R/W ..................................................................................... 68
R/W bit ................................................................................ 78
R/W bit ................................................................................ 79
RAM. See Data Memory
RCE,Receive Enable bit, RCE ............................................ 70
RCREG ............................................................................... 15
RCSTA Register.................................................................. 15
Read/Write bit, R/W ............................................................ 68
READING............................................................................ 45
Receive Overflow Indicator bit, SSPOV .............................. 69
Register File ........................................................................ 11
Register File Map ................................................................ 12
Registers
FSR Summary ............................................................ 15
INDF Summary ........................................................... 15
INTCON Summary ...................................................... 15
PCL Summary............................................................. 15
PCLATH Summary ..................................................... 15
PORTB Summary ....................................................... 15
SSPSTAT.................................................................... 68
STATUS Summary ..................................................... 15
TMR0 Summary .......................................................... 15
TRISB Summary ......................................................... 15
Reset......................................................................... 125, 129
Block Diagram........................................................... 129
Brown-out Reset (BOR). See Brown-out Reset (BOR)
MCLR Reset. See MCLR
Power-on Reset (POR). See Power-on Reset (POR)
Reset Conditions for All Registers ............................ 132
Reset Conditions for PCON Register........................ 131
Reset Conditions for Program Counter ..................... 131
Reset Conditions for STATUS Register .................... 131
Restart Condition Enabled bit, RSE .................................... 70
Revision History ................................................................ 189
RSE..................................................................................... 70
S
SAE ..................................................................................... 70
SCK..................................................................................... 71
SCL..................................................................................... 78
SDA .................................................................................... 78
SDI...................................................................................... 71
SDO .................................................................................... 71
SEEVAL® Evaluation and Programming System............. 152
Serial Clock, SCK ............................................................... 71
Serial Clock, SCL................................................................ 78
Serial Data Address, SDA .................................................. 78
Serial Data In, SDI .............................................................. 71
Serial Data Out, SDO ......................................................... 71
Slave Select Synchronization ............................................. 74
Slave Select, SS ................................................................. 71
SLEEP .............................................................. 125, 129, 138
SMP .................................................................................... 68
Software Simulator (MPLAB-SIM) .................................... 150
SPE..................................................................................... 70
Special Features of the CPU ............................................ 125
Special Function Registers ................................................. 13
PIC16C717 ................................................................. 13
PIC16C717/770/771 ................................................... 13
PIC16C770 ................................................................. 13
PIC16C771 ................................................................. 13
Speed, Operating.................................................................. 1
SPI
Master Mode............................................................... 73
Serial Clock................................................................. 71
Serial Data In .............................................................. 71
Serial Data Out ........................................................... 71
Serial Peripheral Interface (SPI) ................................. 67
Slave Select................................................................ 71
SPI Clock .................................................................... 73
SPI Mode .................................................................... 71
SPI Clock Edge Select, CKE .............................................. 68
SPI Data Input Sample Phase Select, SMP ....................... 68
SPI Master/Slave Connection............................................. 72
SPI Module
Master/Slave Connection............................................ 72
Slave Mode................................................................. 74
Slave Select Synchronization ..................................... 74
Slave Synch Timnig .................................................... 74
SS ....................................................................................... 71
SSP..................................................................................... 67
Block Diagram (SPI Mode) ......................................... 71
Enable (SSPIE Bit) ..................................................... 19
SPI Mode .................................................................... 71
SSPADD ..................................................................... 78
SSPBUF ............................................................... 73, 78
SSPCON1 .................................................................. 69
SSPCON2 .................................................................. 70
SSPSR ................................................................. 73, 78
SSPSTAT ............................................................. 68, 77
TMR2 Output for Clock Shift................................. 53, 54
SSP I2C
SSP I2C Operation ..................................................... 77
SSP Module
SPI Master Mode ........................................................ 73
SPI Master./Slave Connection.................................... 72
SPI Slave Mode .......................................................... 74
SSPCON1 Register .................................................... 77
SSP Overflow Detect bit, SSPOV....................................... 78
SSPADD Register............................................................... 14
SSPBUF ....................................................................... 15, 78
SSPBUF Register ............................................................... 13
SSPCON Register .............................................................. 13
SSPCON1..................................................................... 69, 77
SSPCON2........................................................................... 70
SSPEN................................................................................ 69
DS41120A-page 194
Advanced Information
© 1999 Microchip Technology Inc.
Share Link: 