PIC16LC717T-I/SO View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC16LC717T-I/SO

18/20-Pin, 8-Bit CMOS Microcontrollers with 10/12-Bit A/D

Microchip Technology 

SSPIF............................................................................ 20, 79

SSPM3:SSPM0................................................................... 69

SSPOV.................................................................... 69, 78, 95

SSPSTAT...................................................................... 68, 77

SSPSTAT Register ............................................................. 14

Stack ................................................................................... 24

Start bit (S) .......................................................................... 68

Start Condition Enabled bit, SAE ........................................ 70

STATUS Register ....................................................... 16, 136

C Bit ............................................................................ 16

DC Bit.......................................................................... 16

IRP Bit......................................................................... 16

PD Bit.......................................................................... 16

RP1:RP0 Bits .............................................................. 16

TO Bit.......................................................................... 16

Z Bit............................................................................. 16

Status Register ................................................................... 16

Stop bit (P) .......................................................................... 68

Stop Condition Enable bit ................................................... 70

Synchronous Serial Port ..................................................... 67

Synchronous Serial Port Enable bit, SSPEN ...................... 69

Synchronous Serial Port Interrupt ....................................... 20

Synchronous Serial Port Mode Select bits,

SSPM<3:0>......................................................................... 69

T

T1CON ................................................................................ 15

T1CON Register ........................................................... 15, 49

T1CKPS Bits ............................................................... 49

T1OSCEN Bit.............................................................. 49

T1SYNC Bit................................................................. 49

TMR1CS Bit ................................................................ 49

TMR1ON Bit................................................................ 49

T2CON Register ........................................................... 15, 53

T2CKPS Bits ............................................................... 53

TMR2ON Bit................................................................ 53

TOUTPS Bits .............................................................. 53

Timer0 ................................................................................. 47

Block Diagram............................................................. 47

Clock Source Edge Select (T0SE Bit)................... 17, 47

Clock Source Select (T0CS Bit)............................ 17, 47

Overflow Enable (T0IE Bit) ......................................... 18

Overflow Flag (T0IF Bit)...................................... 18, 136

Overflow Interrupt ............................................... 48, 136

Timer1 ................................................................................. 49

Block Diagram............................................................. 50

Capacitor Selection..................................................... 51

Clock Source Select (TMR1CS Bit) ............................ 49

External Clock Input Sync (T1SYNC Bit) .................... 49

Module On/Off (TMR1ON Bit)..................................... 49

Oscillator ............................................................... 49, 51

Oscillator Enable (T1OSCEN Bit) ............................... 49

Overflow Enable (TMR1IE Bit).................................... 19

Overflow Interrupt ................................................. 49, 51

Special Event Trigger (CCP)................................. 51, 57

T1CON Register ......................................................... 49

TMR1H Register ......................................................... 49

TMR1L Register.......................................................... 49

Timer2

Block Diagram............................................................. 54

PR2 Register......................................................... 53, 58

SSP Clock Shift..................................................... 53, 54

T2CON Register ......................................................... 53

TMR2 Register............................................................ 53

TMR2 to PR2 Match Enable (TMR2IE Bit) ................. 19

TMR2 to PR2 Match Interrupt ......................... 53, 54, 58

PIC16C717/770/771

Timing Diagrams

Acknowledge Sequence Timing ................................. 98

Baud Rate Generator with Clock Arbitration............... 86

BRG Reset Due to SDA Collision............................. 105

Brown-out Reset....................................................... 164

Bus Collision

Start Condition Timing ...................................... 104

Bus Collision During a Restart Condition (Case 1)... 106

Bus Collision During a Restart Condition (Case2).... 106

Bus Collision During a Start Condition (SCL = 0) ..... 105

Bus Collision During a Stop Condition...................... 107

Bus Collision for Transmit and Acknowledge ........... 103

Capture/Compare/PWM ........................................... 166

CLKOUT and I/O ...................................................... 162

External Clock Timing............................................... 162

I2C Master Mode First Start bit timing ........................ 87

I2C Master Mode Reception timing............................. 97

I2C Master Mode Transmission timing ....................... 94

Master Mode Transmit Clock Arbitration .................. 102

Power-up Timer ........................................................ 164

Repeat Start Condition ............................................... 89

Reset ........................................................................ 164

Slave Synchronization ................................................ 74

Start-up Timer........................................................... 164

Stop Condition Receive or Transmit ......................... 100

Time-out Sequence on Power-up..................... 133, 134

Timer0 ...................................................................... 165

Timer1 ...................................................................... 165

Wake-up from SLEEP via Interrupt .......................... 139

Watchdog Timer ....................................................... 164

TMR0 .................................................................................. 15

TMR0 Register.................................................................... 13

TMR1H ............................................................................... 15

TMR1H Register ................................................................. 13

TMR1L ................................................................................ 15

TMR1L Register.................................................................. 13

TMR2 .................................................................................. 15

TMR2 Register.................................................................... 13

TRISA Register........................................................... 14, 124

TRISB Register........................................................... 14, 124

TXREG ............................................................................... 15

U

Update Address, UA ........................................................... 68

USART

Receive Enable (RCIE Bit) ......................................... 19

W

W Register ........................................................................ 136

Wake-up from SLEEP............................................... 125, 138

Interrupts .......................................................... 131, 132

MCLR Reset ............................................................. 132

Timing Diagram ........................................................ 139

WDT Reset ............................................................... 132

Watchdog Timer (WDT)............................................ 125, 137

Block Diagram .......................................................... 137

Enable (WDTE Bit) ................................................... 137

Programming Considerations ................................... 137

RC Oscillator ............................................................ 137

Time-out Period ........................................................ 137

WDT Reset, Normal Operation................. 129, 131, 132

WDT Reset, SLEEP ......................................... 131, 132

Waveform for General Call Address Sequence.................. 83

WCOL ................................................. 69, 87, 92, 95, 98, 100

WCOL Status Flag.............................................................. 87

Write Collision Detect bit, WCOL........................................ 69

WWW, On-Line Support ....................................................... 3

© 1999 Microchip Technology Inc.

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