ST10F280 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
ST10F280 Datasheet PDF : 186 Pages
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ST10F280
Table 3 : Instructions
Instruction Mne Cycle
Read/Reset
Addr.1
RD 1+
Data
Read/Reset
Addr.1
RD 3+
Data
Addr.1
Program Word PW 4
Data
Block Erase
Addr.1
BE 6
Data
Chip Erase
Addr.1
CE 6
Data
Addr.1
Erase Suspend ES 1
Data
Addr.1
Erase Resume ER 1
Data
Set Block/Code
Addr.1
Protection
SP 4
Read
Protection
Status
Data
Addr.1
RP 4
Data
Block
Temporary
Unprotection
Code
Temporary
Unprotection
Code
Temporary
Protection
BTU 4
CTU 1
CTP 1
Addr.1
Data
Addr.1
Data
Addr.1
Data
1st
Cycle
X2
xxF0h
x1554h
xxA8h
x1554h
xxA8h
x1554h
xxA8h
x1554h
xxA8h
X2
xxB0h
X2
xx30h
x2A54h
xxA8h
x2A54h
xxA8h
x2A54h
xxA8h
2nd
Cycle
3rd
Cycle
4th Cycle
5th
Cycle
6th
7th
Cycle Cycle
Read Memory Array until a new write cycle is initiated
x2AA8h
xx54h
x2AA8h
xx54h
x2AA8h
xx54h
x2AA8h
xx54h
xxxxxh
xxF0h
x1554h
xxA0h
x1554h
xx80h
x1554h
xx80h
Read Memory Array until a new write
cycle is initiated
WA 3
WD 4
x1554h
Read Data Polling or
Toggle Bit until Program
completes.
x2AA8h BA BA’ 5
xxA8h xx54h xx30h xx30h
x1554h
xxA8h
x2AA8h x1554h Note 6
xx54h xx10h
Read until Toggle stops, then read or program all data needed
from block(s) not being erased then Resume Erase.
Read Data Polling or Toggle bit until Erase completes or Erase
is supended another time.
x15A8h
xx54h
x15A8h
xx54h
x15A8h
xx54h
x2A54h
xxC0h
x2A54h
xx90h
x2A54h
xxC1h
Any odd
word
address 9
WPR 7
Any odd
word
address 9
Read
PR
X2
Read Protection Register
until a new write cycle is
initiated.
xxF0h
MEM 8
FFFFh
Write cycles must be executed from Flash.
MEM 8
FFFBh
Write cycles must be executed from Flash.
Notes 1. Address bit A14, A15 and above are don’t care for coded address inputs.
2. X = Don’t Care.
3. WA = Write Address: address of memory location to be programmed.
4. WD = Write Data: 16-bit data to be programmed
5. Optional, additional blocks addresses must be entered within a time-out delay (96 µs) after last write entry, timeout status can be
verified through FSB.3 value. When full command is entered, read Data Polling or Toggle bit until Erase is completed or suspended.
6. Read Data Polling or Toggle bit until Erase completes.
7. WPR = Write protection register. To protect code, bit 15 of WPR must be ‘0’. To protect block N (N=0,1,...), bit N of WPR must be
‘0’. Bit that are already at ‘0’ in protection register must also be ‘0’ in WPR, else a writing error will occurs (it is not possible to write a
‘1’ in a bit already programmed at ‘0’).
8. MEM = any address inside the Flash memory space. Absolute addressing mode must be used (MOV MEM, Rn), and instruction
must be executed from Flash memory space.
9. Odd word address = 4n-2 where n = 0, 1, 2, 3..., ex. 0002h, 0006h...
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