ST7MC1xx/ST7MC2xx
MOTOR CONTROLLER (Cont’d)
MOTOR D EVENT FILTER REGISTER (MDFR)
Read/Write
Reset Value: 0000 1111 (0Fh)
7
6
5
4
3
2
1
0
DEF3 DEF2 DEF1 DEF0 DWF3 DWF2 DWF1 DWF0
Bits 7:4 = DEF[3:0]: D Event Filter bits
These bits select the number of valid consecutive
D events (when the D event is detected) needed to
generate the active event. Sampling is done at the
selected fSCF frequency, see Table 82.
Table 69. D Event filter Setting
DEF3 DEF2 DEF1 DEF0
D event
Samples
SR=1
0
0
0
0
1
0
0
0
1
2
0
0
1
0
3
0
0
1
1
4
0
1
0
0
5
0
1
0
1
6
0
1
1
0
7
0
1
1
1
8
1
0
0
0
9
1
0
0
1
10
1
0
1
0
11
1
0
1
1
12
1
1
0
0
13
1
1
0
1
14
1
1
1
0
15
1
1
1
1
16
Bit 3:0 = DWF[3:0]: D Window Filter bits
These bits select the length of the blanking win-
dow activated at each C event. The filter blanks
the D event detection.
Table 70. D Window Filter setting
DWF3
DWF2
DWF1
DWF0
C to D
Window
Filter in
Sensorless
mode (SR=0)
SR=1
0
0
0
0
5µs
0
0
0
1
10µs
0
0
1
0
15µs
0
0
1
1
20µs
0
1
0
0
25µs
0
1
0
1
30µs
0
1
1
0
35µs
0
1
1
1
40µs
1
0
0
0
60µs
1
0
0
1
80µs
1
0
1
0
100µs
1
0
1
1
120µs
1
1
0
0
140µs
1
1
0
1
160µs
1
1
1
0
180µs
1
1
1
1
200µs
Note: Times are indicated for 4 MHz fPERIPH
216/309