ST92195C/D - TIMING AND CLOCK CONTROLLER
Figure 33. Programming the MCCR
Set the PLL frequency
FML (3:0)
Start the PLL by setting
FMEN = 1
Wait for Clock
Stabilization
Example:
spp
#27h ;Set the page
ld MCCR, #04h ;Set FML bits to the value needed e.g. 10 MHz
or MCCR, #80h ;Starts the PLL
Wait for stabilization time
or MCCR, #40h ;Validate the PLL as the main CPU Clock
Validate PLL as Main
CPU Clock
Figure 34. Programming the SKCCR, PXCCR
Set the PLL frequency
SKW (3:0)
Start the PLL by setting
SKWEN = 1
Wait for Clock
Stabilization
Example:
spp
#27h ;Set the page
ld SKCCR, #04h ;Set SKW bits to the value needed
or SKCCR, #80h ;Starts the PLL
Wait for stabilization time
or PXCCR, #80h ;PLL is fed as DOTCK to the TDSRAM & OSDPLL
Validate PLL is fed to
TDSRAM and OSD
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