STA321TR View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
STA321TR Datasheet PDF : 157 Pages
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I2C disabled (microless) mode
15
I2C disabled (microless) mode
Figure 55. Microless mode block diagram
STA321
SDATAO1
BICLKI1
LRCLKI1
SDATAI1
BICLKI2
LRCLKI2
SDATAI2
INL1
INL2
INR1
INR2
V_BIAS
VCM
VHI
VLO
Output
SAI
Input
SAI
ADC
4-channel
sample rate
converter
Osc
PLL
Divider
EAFTN
EATSN
EAPDN
Vol
ctrl
FFX™
modulator
EAPWM4
EAPWM3
EAPWM2
EAPWM1
CMOS
bridge
OUT1
OUT2
OUT3
PWM00
In microless mode (I2CDIS = 1) the I2C interface is inhibited and SDA and SCL are used as
static inputs. The device is working in the configuration shown in Figure 55 with the ADC
connected to input line 1 and to SAI out. The processing chain uses the inputs from SAI
input 1. The working modes are selected via the logical levels on the inputs SDA, SCL as
follows:
z SCL = 0 : CMOS bridge outputs come from digital input serial audio interface;
SCL = 1 : CMOS bridge outputs come from analog ADC input.
z SDA = 0 : external amplifier outputs come from digital input serial audio interface;
SDA = 1 : external amplifier outputs come from analog ADC input.
At power-up the channel volume is set to -60 dB. The volume is controlled by pulsing the
inputs LRCLKO and BICLKO as follows:
z when pulsing LRCLKO = 1 and BICLKO = 1 simultaneously the channel volume is set
to 0 dB.
z Any LRCLKO = 1 pulse causes a channel volume decrease of 0.5 dB.
z Any BICLKO = 1 pulse causes a channel volume increase of 0.5 dB.
The channel volume change applies only to the external amplifier.
The digital output serial audio interface is always fed with the result of the ADC conversion
with no volume control (line-out mode). It is in master mode when SCL = 1 and SDA = 1
otherwise it is in slave mode. It is configured in I2S format.
The LRCLK and BICLK signals are shared between input and output SAI.
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Doc ID 15351 Rev 3
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