STA321
Electrical specifications
Table 6. Electrical specifications (continued)
Symbol
Parameter
Test conditions
Min Typ Max Unit
Amplifier (CMOS bridge)
η
Output power efficiency
-
-
90
Output power in HP mode with
THD = 1%
3.3-V supply RL = 32 Ω -
41
PHPOUT
Output power in HP mode with
THD = 10%
3.3-V supply RL = 32 Ω -
53
SNR
Signal to noise ratio
20 Hz to 20 kHz
-
75
THD + N
Total harmonic distortion plus noise
RL = 32 Ω,
HP mode
0 dBFs In
-6 dBFs In
-
-
0.3
0.05
DR
Dynamic range
A-weighted
-
80
ISTBYP
IDDP
Current in standby, pins VCCx
-
-
2
Operating current, pins VCCx
No LC filter, no load,
PWM at 50% duty-cycle
-
1
IDDPD
Pre-drive supply current in
operation, pin VCC33
No load,
PWM at 50% duty-cycle
-
250
tR
tF
RDSON
Driver rise time, pins OUT1-3
Resistive load, see Figure 3 -
5
Driver fall time, pins OUT1-3
Resistive load, see Figure 3 -
5
Headphone output stage N/P MOS
on-resistance
-
-
500
IOCH
Over-current limit for OUT1-3 to
VCCx short circuit
-
-
1.88
IOCL
Over-current limit for OUT1-3 to
ground short circuit
-
-
1.72
PLL
ISTDBYPLL
IDDPLL
fCLKIN_Range
DutyCLKIN
tCLKIN_RF
fF_INT
fVCO_Range
DutyVCO
TLOCK
PLL supply current in standby
PLL supply current in operation
Input clock frequency range
Input clock duty cycle
Input clock rise/fall time
PFD input clock frequency
Clock out range
Clock out duty cycle
Lock time
-
-
-
-
-
PLL_FR_CTRL = 1
-
-
-
-
20
-
0.4
2.048 -
40
-
-
-
2.048 -
65.536 -
35
-
-
-
-
%
-
mW
-
-
dB
-
%
-
-
dB
-
µA
-
mA
350 µA
-
ns
-
ns
700 mΩ
-
A
-
A
-
µA
1.0 mA
49.152 MHz
60
%
0.2 ns
12.288 MHz
98.304 MHz
65
%
200 µs
Doc ID 15351 Rev 3
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