STA32813TR View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

STA32813TR

2.1-channel high-efficiency digital audio system

STMicroelectronics 

I2C bus specification

STA328

Current address multi-byte read

The multi-byte read modes can start from any internal address. Sequential data bytes will be

read from sequential addresses within the STA328. The master acknowledges each data

byte read and then generates a STOP condition terminating the transfer.

Random address byte read

Following the START condition the master sends a device select code with the RW bit set

to 0. The STA328 acknowledges this and then the master writes the internal address byte.

After receiving, the internal byte address the STA328 again responds with an

acknowledgement. The master then initiates another START condition and sends the device

select code with the RW bit set to 1. The STA328 acknowledges this and then responds by

sending one byte of data. The master then terminates the transfer by generating a STOP

condition.

Random address multi-byte read

The multi-byte read modes could start from any internal address. Sequential data bytes will

be read from sequential addresses within the STA328. The master acknowledges each data

byte read and then generates a STOP condition terminating the transfer.

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