STA32813TR View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

STA32813TR

2.1-channel high-efficiency digital audio system

STMicroelectronics 

STA328

Register description

6.11

6.11.1

6.11.2

6.11.3

6.11.4

6.11.5

Dynamics control

Limiter 1 attack/release threshold (addr 0x12)

D7

L1A3

0

D6

L1A2

1

D5

L1A1

1

D4

L1A0

0

D3

L1R3

1

D2

L1R2

0

D1

L1R1

1

D0

L1R0

0

Limiter 1 attack/release threshold (addr 0x13)

D7

L1AT3

0

D6

L1AT2

1

D5

L1AT1

1

D4

L1AT0

0

D3

L1RT3

1

D2

L1RT2

0

D1

L1RT1

0

D0

L1RT0

1

Limiter 2 attack/release rate (addr 0x14)

D7

L2A3

0

D6

L2A2

1

D5

L2A1

1

D4

L2A0

0

D3

L2R3

1

D2

L2R2

0

D1

L2R1

1

D0

L2R0

0

Limiter 2 attack/release threshold (addr 0x15)

D7

L2AT3

0

D6

L2AT2

1

D5

L2AT1

1

D4

L2AT0

0

D3

L2RT3

1

D2

L2RT2

0

D1

L2RT1

0

D0

L2RT0

1

Dynamics control description

The STA328 includes 2 independent limiter blocks. The purpose of the limiters is to

automatically reduce the dynamic range of a recording to prevent the outputs from clipping

in anti-clipping mode, or to actively reduce the dynamic range for a better listening

environment (such as a night-time listening mode, which is often needed for DVDs.) The two

modes are selected via the DRC bit in configuration register D (bit 5, address 0x03). Each

channel can be mapped to Limiter1, Limiter2, or not mapped.

If a channel is not mapped, that channel will clip normally when 0 dBFS is exceeded. Each

limiter will look at the present value of each channel that is mapped to it, select the

maximum absolute value of all these channels, perform the limiting algorithm on that value,

and then if needed adjust the gain of the mapped channels in unison.

The limiter attack thresholds are determined by the LxAT registers. When the attack

threshold has been exceeded, the limiter, when active, will automatically start reducing the

gain. The rate at which the gain is reduced when the attack threshold is exceeded is

dependent upon the attack rate register setting for that limiter. The gain reduction occurs on

a peak-detect algorithm.

The release of limiter, when the gain is again increased, is dependent on a RMS-detect

algorithm. The output of the volume/limiter block is passed through an RMS filter. The output

of this filter is compared to the release threshold, determined by the Release Threshold

register.

When the RMS filter output falls below the release threshold, the gain is increased at a rate

dependent upon the release rate register. The gain can never be increased past its set value

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