STA328
User programmable processing
7.6.14
7.6.15
7.6.16
7.6.17
Coefficient b0 data register bits 23:16 (addr 0x23)
D7
C5B23
0
D6
C5B22
0
D5
C5B21
0
D4
C5B20
0
D3
C5B19
0
D2
C5B18
0
Coefficient b0 data register bits 15:8 (addr 0x24)
D1
C5B17
0
D0
C5B16
0
D7
C5B15
0
D6
C5B14
0
D5
C5B13
0
D4
C5B12
0
D3
C5B11
0
D2
C5B10
0
D1
C5B9
0
D0
C5B8
0
Coefficient b0 data register bits 7:0 (addr 0x25)
D7
C5B7
0
D6
C5B6
0
D5
C5B5
0
D4
C5B4
0
D3
C5B3
0
D2
C5B2
0
D1
C5B1
0
D0
C5B0
0
Coefficient write control register (addr 0x26)
D7
D6
D5
D4
D3
D2
D1
D0
Reserved
Reserved
Reserved
Reserved
RA
R1
WA
W1
0
0
0
0
0
0
0
0
Coefficients for EQ, mix and scaling are handled internally in the STA328 via RAM. Access
to this RAM is available to the user via an I2C register interface. A collection of I2C registers
are dedicated to this function. First register contains the coefficient base address, five sets
of three registers store the values of the 24-bit coefficients to be written or that were read,
and one contains bits used to control the read or write of the coefficient (s) to RAM. The
following are instructions for reading and writing coefficients.
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