STA335BWS View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
STA335BWS Datasheet PDF : 68 Pages
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Register description
Table 18. Channel volume as a function of CxV[7:0] (continued)
CxV[7:0]
Volume
…
…
11010111 (0xD7)
-59.5 dB
11011000 (0xD8)
11011001 (0xD9)
-60 dB
-61 dB
11011010 (0xDA)
-62 dB
…
…
11101100 (0xEC)
-80 dB
11101101 (0xED)
…
Hard channel mute
…
11111111 (0xFF)
Hard channel mute
STA335BWS
6.8
6.8.1
6.8.2
Auto mode registers (addr 0x0B and 0x0C)
Automode register 1 (address 0x0B)
AMGC[1:0], in conjunction with AMGC[3:2] defined in register 0x31, defines anti-clipping
and DRC presets. Using AMGC[3:0] bits, attack and release thresholds and rates are
automatically configured to properly fit application specific configuration.
D7
D6
D5
D4
D3
D2
D1
D0
Reserved
AMGC1
AMGC2
Reserved
0
0
Table 19. AutoMode gain compression/limiters selection
AMGC[1:0]
Mode
00
User programmable GC
01
AC no clipping 2.1
10
AC limited clipping (10%) 2.1
11
DRC nighttime listening mode 2.1
AutoMode register 2 (address 0x0C)
D7
XO3
0
D6
XO2
0
D5
XO1
0
D4
XO0
0
D3
AMAM2
0
D2
AMAM1
0
D1
AMAM0
0
D0
AMAME
0
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