STLC5412 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
STLC5412 Datasheet PDF : 74 Pages
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STLC5412
on Br is in the high impedance state.
A 24 ms timer is implemented in the UID. This
timer (when enabled) starts each time the sender
starts a byte sending and waits for a pre acknow-
ledgement.
C/I channel
The C/I channel is used for TXACT and RXACT
registers write and read operation. However, it is
possible to access to ACT registers by monitor
channel: this access is controled by the CID bit in
CR2 register.
The four bits code (C1,C2,C3,C4) of TXACT reg-
ister can be loaded in the UID by writing perma-
nently this code in the C/I channel time-slot on Bx
input every GCI frames. The UID takes into ac-
count the received code when it has been re-
ceived two consecutive times identical. When a
status change occurs in the RXACT register, the
new (C1,C2,C3,C4) code is sent in the C/I chan-
nel time-slot on Br output every GCI frames. This
code is sent permanently by the UID until a new
status change occurs in RXACT register.
C1 bit is sent first to the line.
LINE CODING AND FRAME FORMAT
2B1Q coding rule requires that binary data bits
are grouped in pairs so called quats (see Tab.2).
Each quat is transmitted as a symbol, the magni-
tude of which may be 1 out 4 equally spaced volt-
age levels (see Fig. 6). +3 quat refers to the
nominal pulse waveform specified in the ANSI
standard. Other quats are deduced directly with
respect of the ratio and keeping of the waveform.
The frame format used in UID follows ANSI speci-
fication (see Tab. 3 and 4). Each complete frame
consists of 120 quats, with a line baud rate of 80
kbaud, giving a frame duration of 1.5ms. A nine
quats lenght sync-word defines the framing
boundary. Furthermore, a Multiframe consisting of
8 frames is defined in order to provide sub-chan-
nels within the spare bits M1 to M6. Inversion of
the syncword defines the multiframe boundary. In
LT, the transmit multiframe starting time may be
synchronized by means of a 12 ms period of time
pulse on the SFSx pin selected as an input (bit
SFS in CR2); If SFSx is selected as an output,
SFSx provides a square wave signal with the ris-
ing edge indicating the multiframe starting time.
In NT, the transmit multiframe starting time is pro-
Figure 5: GCI Monitor channel messaging examples.
Tx TMx X
M1
M1
M2
M2
X
Tx TEx
RxRAx
X
X
1st byte
(M1)
Ready
pre-ack
for a message (M1)
2nd byte
(M2)
ack
(M1)
pre-ack
(M2)
3rd byte?? EOM
(X)
ack
(M2)
pre-ack??
(X)
Ready for
TWO BYTES MESSAGE - NORMAL TRANSMISSION
TxTxM X
TxTxE
RRx xA
M1
M1
M2
M2
X
X
X
X
M1
M1
M2
1st byte
(M1)
Ready for pre-ack
a message (M1)
2nd byte
(M2)
ack
(M1)
pre-ack
(M2)
3rd byte?? EOM
(X)
(or abort ack)
abort
(M2)
Ready for
retransmission
TWO BYTES MESSAGE ABORTED ON THE SECOND AND RETRANSMITTED
E & A BITS TIMING
1st byte
(M1)
pre-ack
(M1)
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