STM32F050G4U7 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

STM32F050G4U7

Low- and medium-density advanced ARM™-based 32-bit MCU with up to 32 Kbytes Flash, timers, ADC and comm. interfaces

STMicroelectronics 

STM32F050xx

Electrical characteristics

Table 59. SPI characteristics

Symbol

Parameter

Conditions

Min

Max

Unit

fSCK

1/tc(SCK)

SPI clock frequency

Master mode

Slave mode

-

-

tr(SCK)

tf(SCK)

tsu(NSS)(1)

th(NSS)(1)

tw(SCKH)(1)

tw(SCKL)(1)

tsu(MI) (1)

tsu(SI)(1)

th(MI) (1)

th(SI)(1)

ta(SO)(1)(2)

tdis(SO)(1)(3)

tv(SO) (1)

tv(MO)(1)

th(SO)(1)

th(MO)(1)

DuCy(SCK)

SPI clock rise and fall

time

Capacitive load: C = 15 pF

NSS setup time

Slave mode

NSS hold time

Slave mode

SCK high and low time

Master mode, fPCLK = 36 MHz,

presc = 4

Data input setup time

Master mode

Slave mode

Data input hold time

Master mode

Slave mode

Data output access time Slave mode, fPCLK = 20 MHz

Data output disable time Slave mode

Data output valid time Slave mode (after enable edge)

Data output valid time Master mode (after enable edge)

Data output hold time

Slave mode (after enable edge)

Master mode (after enable edge)

SPI slave input clock duty

cycle

Slave mode

-

4Tpclk

2Tpclk + 10

Tpclk/2 -2

4

5

4

5

0

0

-

-

11.5

2

25

18

18

6

-

-

Tpclk/2 + 1

-

-

-

-

3Tpclk

18

22.5

6

-

-

75

MHz

ns

ns

%

1. Data based on characterization results, not tested in production.

2. Min time is for the minimum time to drive the output and the max time is for the maximum time to validate the data.

3. Min time is for the minimum time to invalidate the output and the max time is for the maximum time to put the data in Hi-Z

Doc ID 023683 Rev 1

79/97

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