STM32F050G4U7 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
STM32F050G4U7
STMicroelectronics
STM32F050G4U7 Datasheet PDF : 97 Pages
| |||
Electrical characteristics
Figure 27. SPI timing diagram - slave mode and CPHA = 0
NSS input
CPHA= 0
CPOL=0
CPHA= 0
CPOL=1
tSU(NSS)
tc(SCK)
tw(SCKH)
tw(SCKL)
ta(SO)
MISO
OUT P UT
MOSI
I NPUT
tsu(SI)
tv(SO)
MS B O UT
M SB IN
th(SI)
th(SO)
BI T6 OUT
B I T1 IN
Figure 28. SPI timing diagram - slave mode and CPHA = 1(1)
STM32F050xx
th(NSS)
tr(SCK)
tf(SCK)
tdis(SO)
LSB OUT
LSB IN
ai14134c
NSS input
tSU(NSS)
CPHA=1
CPOL=0
CPHA=1
CPOL=1
tw(SCKH)
tw(SCKL)
MISO
OUT P UT
MOSI
I NPUT
ta(SO)
tsu(SI)
tc(SCK)
tv(SO)
MS B O UT
th(SI)
M SB IN
th(SO)
BI T6 OUT
B I T1 IN
1. Measurement points are done at CMOS levels: 0.3VDD and 0.7VDD.
th(NSS)
tr(SCK)
tf(SCK)
tdis(SO)
LSB OUT
LSB IN
ai14135
80/97
Doc ID 023683 Rev 1
Share Link: 