NXP Semiconductors
TDA1566
I2C-bus controlled dual channel/single channel ampliï¬er
offset
threshold
Vo = VOUT+ − VOUT−
offset
time
threshold
DB1[D2] read
DB1[D2] = 1 0
0 => 1
DIAG
Vo = VOUT+ − VOUT−
time
time
Vo = VOUT+ − VOUT−
Vo = VOUT+ − VOUT−
offset
offset
threshold
time
threshold
time
DB1[D2] read
DB1[D2] = 1 1
1
DIAG
time
001aad 013
I2C-bus mode only
TH version only: Non-I2C-bus mode
TH/J version: I2C-bus mode with offset
fault selected on DIAG
Fig 10. Offset detection in I2C-bus mode and in non-I2C-bus mode
6.4 I2C-bus operation
6.4.1 I2C-bus address with hardware address select
Table 16. I2C-bus address table TH version
ADS1
ADS2 A6
A5
A4
A3
A2
A1
A0
R/W[1]
open
open 1
1
0
1
0
0
0
1/0
GND 1
1
0
1
0
0
1
1/0
33 kΩ to GND open 1
1
0
1
0
1
0
1/0
GND 1
1
0
1
0
1
1
1/0
[1] 0 = write to TDA1566TH; 1 = read from TDA1566TH.
Table 17. I2C-bus address table J version
ADS1
A6
A5
A4
A3
A2
A1
A0
R/W[1]
open
1
1
0
1
0
0
1
1/0
33 kΩ to GND 1
1
0
1
0
1
1
1/0
[1] 0 = write to TDA1566J; 1 = read from TDA1566J.
TDA1566_2
Product data sheet
Rev. 02 — 20 August 2007
© NXP B.V. 2007. All rights reserved.
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