TDA7500ATR View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
TDA7500ATR Datasheet PDF : 41 Pages
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TDA7500A
SAMPLE RATE CONVERTER
Fsin/Fsout = 1 (44.1KHz)
Symbol
Parameter
THD+N Total Harmonic Distortion +
Noise
DR Dynamic Range
IPD
fc
Rp
Rs
Tg
Fratio
Interchannel Phase Deviation
Cutoff Frequency
Pass Band Ripple
Stopband Attenuation
Group Delay
Fsin / Fsout
Test Condition
Min.
20Hz to 20kHz, Full Scale, 16 bit inp.
20Hz to 20kHz, Full Scale, 20 bit inp.
1 kHz Full Scale, 16 bit inp.
10 kHz Full Scale, 16 bit inp.
1 kHz Full Scale, 20 bit inp.
10 kHz Full Scale, 20 bit inp
1 kHz -60 dB - 16 bit inp.,A-Weighted 98
1 kHz -60 dB - 20 bit inp.,A-Weighted 120
@ -3 dB
from 0 to 20kHz
@24.1kHz
Fsout = 44.1 kHz
-0.05
0.7
Typ.
20
-105
612
Max. Unit
-98
dB
-101 dB
-98
dB
-98
dB
-109 dB
-102 dB
dB
dB
0 Degree
Hz
+0.05 dB
dB
µs
1.05
RDS TIMING
Symbol
Parameter
Test Condition
Min. Typ. Max. Unit
Fcrystal Crystal Frequency
First mode
-
8.55
-
MHz
Second mode
-
8.664
-
MHz
tbclk RDS SPI Bit Clock
(TDSP is the period of the dsp core)
3TDSP
-
-
ns
tdis SPI Disable time between 2
transfers
3TDSP
-
-
ns
The RDS block adhere to the timings defined by the RDS standard EN50067. More information are also available in the dedicated Appllication
Note.
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