AT80251G2D-3CSUM(2006) View Datasheet(PDF) - Atmel Corporation
Part Name
Description
Manufacturer
AT80251G2D-3CSUM
(Rev.:2006)
(Rev.:2006)
Atmel Corporation
AT80251G2D-3CSUM Datasheet PDF : 77 Pages
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Special Function
Registers
4135F–8051–11/06
AT/TSC8x251G2D
The Special Function Registers (SFRs) of the TSC80251G2D derivatives fall into the
categories detailed in Table 1 to Table 9.
SFRs are placed in a reserved on-chip memory region S: which is not represented in the
data memory mapping (Figure 5). The relative addresses within S: of these SFRs are
provided together with their reset values in Table . They are upward compatible with the
SFRs of the standard 80C51 and the Intel’s 80C251Sx family. In this table, the C251
core registers are identified by Note 1 and are described in the TSC80251 Program-
mer’s Guide. The other SFRs are described in the TSC80251G1D Design Guide. All the
SFRs are bit-addressable using the C251 instruction set.
Table 1. C251 Core SFRs
Mnemonic Name
Mnemonic Name
ACC(1)
Accumulator
SPH(1)
Stack Pointer High - MSB of
SPX
B(1)
B Register
DPL(1)
Data Pointer Low byte - LSB of
DPTR
PSW
Program Status Word
DPH(1)
Data Pointer High byte - MSB
of DPTR
PSW1
SP(1)
Program Status Word 1
Stack Pointer - LSB of SPX
DPXL(1)
Data Pointer Extended Low
byte of DPX - Region number
Note: 1. These SFRs can also be accessed by their corresponding registers in the register
file.
Table 2. I/O Port SFRs
Mnemonic
Name
Mnemonic
Name
P0
Port 0
P2
Port 2
P1
Port 1
P3
Port 3
Table 3. Timers SFRs
Mnemonic Name
TL0
Timer/Counter 0 Low
Byte
TH0
Timer/Counter 0 High
Byte
TL1
Timer/Counter 1 Low
Byte
TH1
Timer/Counter 1 High
Byte
TL2
TH2
TCON
Timer/Counter 2 Low
Byte
Timer/Counter 2 High
Byte
Timer/Counter 0 and 1
Control
Mnemonic Name
TMOD
Timer/Counter 0 and 1
Modes
T2CON
Timer/Counter 2
Control
T2MOD Timer/Counter 2 Mode
RCAP2L
RCAP2H
Timer/Counter 2
Reload/Capture Low
Byte
Timer/Counter 2
Reload/Capture High
Byte
WDTRST WatchDog Timer Reset
13
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