AT80251G2D-3CSUM(2006) View Datasheet(PDF) - Atmel Corporation
Part Name
Description
Manufacturer
AT80251G2D-3CSUM
(Rev.:2006)
(Rev.:2006)
Atmel Corporation
AT80251G2D-3CSUM Datasheet PDF : 77 Pages
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AT/TSC8x251G2D
Table 12. Configuration Byte 1
UCONFIG1
7
6
CSIZE
-
5
4
-
INTR
3
WSB
2
WSB1#
1
WSB0#
0
EMAP#
Bit
Number
Bit Mnemonic Description
On-Chip Code Memory Size bit(1)
CSIZE
Clear to select 16 KB of on-chip code memory (TSC87251G1D
TSC87251G2D product).
7
Set to select 32 KB of on-chip code memory (TSC87251G2D product).
TSC80251G2D Reserved
TSC83251G2D Set this bit when writing to UCONFIG1.
6
-
Reserved
Set this bit when writing to UCONFIG1.
5
-
Reserved
Set this bit when writing to UCONFIG1.
Interrupt Mode bit(2)
Clear so that the interrupts push two bytes onto the stack (the two lower
4
INTR
bytes of the PC register).
Set so that the interrupts push four bytes onto the stack (the three bytes
of the PC register and the PSW1 register).
Wait State B bit(3)
3
WSB
Clear to generate one wait state for memory region 01:.
Set for no wait states for memory region 01:.
2
WSB1#
Wait State B bits
Select the number of wait states for RD#, WR# and PSEN# signals for
external memory accesses (only region 01:).
WSB1# WSB0# Number of Wait States
1
WSB0#
0
0
3
0
1
2
1
0
1
1
1
0
On-Chip Code Memory Map bit
Clear to map the upper 16 KB of on-chip code memory (at FF:4000h-
0
EMAP#
FF:7FFFh) to the data space (at 00:C000h-00:FFFFh).
Set not to map the upper 16 KB of on-chip code memory (at FF:4000h-
FF:7FFFh) to the data space.
Notes:
1. The CSIZE is only available on EPROM/OTPROM products.
2. Two or four bytes are transparently popped according to INTR when using the RETI
instruction. INTR must be set if interrupts are used with code executing outside
region FF:.
3. Use only for Step A compatibility; set this bit when WSB1:0# are used.
19
4135F–8051–11/06
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