TS68230
PSRR
10
11
function ; DMA is not used.
SVCRQ Select
The PC4/DMAREQ pin carries the DMAREQ function and is associatedwith double-buffered
transfers controlled by H1. H1 is removed from PI/T’s interrupt structure, and thus, does not cause
interrupt requests to be generated. To obtain DMAREQ pulses, port A control register bit 1 (H1
SVCRQ enable) must be a one.
The PC4/DMAREQ pin carries the DMAREQ function and is associated with double-buffered
transfers controlled by H3. H3 is removed from the PI/T’s interrupt structure, and thus, does not
cause interrupts requests to be generated. To obtain DMAREQ pulses, port B control register bit
1 (H3 SVCRQ enable) must be one.
PSRR
43
00
01
10
11
Interrupt Pin Function Select
The PC5/PIRQ pin carries the PC5 function, no interrupt support.
The PC6/PIACK pin carries the PC6 function, no interrupt support.
The PC5/PIRQ pin carries the PIRQ function, supports autovectored interrupts.
The PC6/PIACK pin carries the PC6 function, supports autovectored interrupts.
The PC5/PIRQ pin carries the PC5 function.
The PC6/PIACK pin carries the PIACK function.
The PC5/PIRQ pin carries the PIRQ function, supports vectored interrupts.
The PC6/PIACK pin carries the PIACK function, supports vectored interrupts.
Table 4.2 : PSRR Port Interrupt Priority Control.
2 1 0 Highest .......................................Lowest
000
H1S
H2S
H3S
H4S
001
H2S
H1S
H3S
H4S
010
H1S
H2S
H4S
H3S
011
H2S
H1S
H4S
H3S
2 1 0 Highest .......................................Lowest
100
H3S
H4S
H1S
H2S
101
H3S
H4S
H2S
H1S
110
H4S
H3S
H1S
H2S
111
H4S
H3S
H2S
H1S
38/61