P30-65nm SBC
A.1.4
Device Geometry Definition
Table 35: Device Geometry Definition
Offset Length
Description
27h
1
“n” such that device size = 2n in number of bytes
Flash device interface code assignment:
"n" such that n+1 specifies the bit field that represents the flash device width
capabilities as described in the table:
28h
2
7
6
5
4
3
2
1
0
_
_
_
_
x64
x32
x16
x8
15
14
13
12
11
10
9
8
_
_
_
_
_
_
_
_
2Ah
2
“n” such that maximum number of bytes in write buffer = 2n
Number of erase block regions (x) within device:
1. x = 0 means no erase blocking; the device erases in bulk
2Ch
1
2. x specifies the number of device regions with one or more contiguous
same-size erase blocks.
3. Symmetrically blocked partitions have one blocking region
Erase Block Region 1 Information
2D
4
bits 0-15 = y, y+1 = number of identical-size erase blocks
bits 16-31 = z, region erase block(s) size are z x 256 bytes
Erase Block Region 2 Information
31h
4
bits 0-15 = y, y+1 = number of identical-size erase blocks
bits 16-31 = z, region erase block(s) size are z x 256 bytes
35h
4
Reserved for future erase block region information
Add
27:
28:
29:
2A:
2B:
2C:
2D:
2E:
2F:
30:
31:
32:
33:
34:
35:
36:
37:
38:
Hex
Code
Value
See Table Below
--01
x16
--00
--09
512
--00
See Table Below
See Table Below
See Table Below
See Table Below
Address
27:
28:
29:
2A
2B
2C:
2D:
2E:
2F:
64-Mbit
--B
--T
--17
--17
--01
--01
--00
--00
--09
--09
--00
--00
--02
--02
--03
--3E
--00
--00
--80
-00
128-Mbit
--B
--T
--18
--18
--01
--01
--00
--00
--09
--09
--00
--00
--02
--02
--03
--7E
--00
--00
--80
--00
Address
30:
31:
32:
33:
34:
35:
36:
37:
38:
64-Mbit
--B
--T
--00
--02
--3E
--03
--00
--00
--00
--80
--02
--00
--00
--00
--00
--00
--00
--00
--00
--00
128-Mbit
--B
--T
--00
--02
--7E
--03
--00
--00
--00
--80
--02
--00
--00 --00
--00 --00
--00 --00
--00 --00
Datasheet
65
Apr 2010
Order Number:208033-02