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ST7PLITE39F2U6TR View Datasheet(PDF) - STMicroelectronics

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ST7PLITE39F2U6TR Datasheet PDF : 173 Pages
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ST7LITE3xF2
13.8 I/O PORT PIN CHARACTERISTICS
13.8.1 General Characteristics
Subject to general operating conditions for VDD, fOSC, and TA unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
VIL Input low level voltage
VSS - 0.3
0.3xVDD
VIH Input high level voltage
0.7xVDD
VDD + 0.3
Vhys
Schmitt trigger voltage
hysteresis 1)
400
IL
Input leakage current
VSSVINVDD
±1
IS
Static current consumption in-
duced by each floating input pin 2)
Floating input mode
400
RPU
Weak pull-up equivalent resistor3)
VIN=
VSS
VDD=5V
VDD=3V
TA125°C 50
100
200
170
CIO
tf(IO)out
tr(IO)out
tw(IT)in
I/O pin capacitance
Output high to low level fall time 1) CL=50pF
Output low to high level rise time 1) Between 10% and 90%
External interrupt pulse time 4)
5
25
25
1
Unit
V
mV
µA
k
pF
ns
tCPU
Notes:
1. Data based on characterization results, not tested in production.
2. Configuration not recommended, all unused pins must be kept at a fixed voltage: using the output mode of the I/O for
example or an external pull-up or pull-down resistor (see Figure 84). Static peak current value taken at a fixed VIN value,
based on design simulation and technology characteristics, not tested in production. This value depends on VDD and tem-
perature values.
3. The RPU pull-up equivalent resistor is based on a resistive transistor (corresponding IPU current characteristics de-
scribed in Figure 85).
4. To generate an external interrupt, a minimum pulse width has to be applied on an I/O port pin configured as an external
interrupt source.
Figure 84. Two typical Applications with unused I/O Pin
VDD
10k
ST7XXX
UNUSED I/O PORT
10k
UNUSED I/O PORT
ST7XXX
Caution: During normal operation the ICCCLK pin must be pulled- up, internally or externally (external pull-up of 10k mandatory in
noisy environment). This is to avoid entering ICC mode unexpectedly during a reset.
Note: I/O can be left unconnected if it is configured as output (0 or 1) by the software. This has the advantage of greater EMC
robustness and lower cost.
148/173

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