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LFSC3GA25E-5FN900I View Datasheet(PDF) - Lattice Semiconductor

Part Name
Description
Manufacturer
LFSC3GA25E-5FN900I
Lattice
Lattice Semiconductor 
LFSC3GA25E-5FN900I Datasheet PDF : 237 Pages
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Lattice Semiconductor
Pinout Information
LatticeSC/M Family Data Sheet
Signal Descriptions (Cont.)
Signal Name
I/O
Description
RESP_[ULC/URC]
Calibration resistor to be placed between this pin and either ground or
RESPN_[ULC/URC]. RESPN_[ULC/URC] is available on select pack-
ages. If available, connection of calibration resistor between
— RESP_[ULC/URC] and RESPN_[ULC/URC] takes precedence over
connection of calibration resistor between RESP_[ULC/URC] and
ground. Note: only one per side of the device. Value: 4.02K ohm
+/- 1% ohm.
RESPN_[ULC/URC]
Available on selected packages. If available, calibration resistor should
be placed between RESP_[ULC/URC] and RESPN_[ULC/URC]
instead of between RESP_[ULC/URC] and ground. Note: only one per
side of the device. Value: 4.02K ohm +/- 1% ohm.
[A:D]_VDDIBx_[L/R]
Input buffer power supply for channel x (1.2V/1.5V) on left [L] or right
[R] side of device.
[A:D]_VDDOBx_[L/R]
Output buffer power supply for channel x (1.2V/1.5V) on left [L] or right
[R] side of device.
[A:D]_VDDAX25_[L/R]
Auxiliary power for input and output termination (2.5V) on left [L] or
right [R] side of device.
1. The ispLEVER software tools may specify VDDRX, VDDTX, VDDP and VCCL pins. These pins should be considered VCC12 pins.
Note: Signals listed as Signal A / Signal B define the same physical pin that is used for different functions based on configuration
mode.
4-6

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