AT91SAM9G46B-CU View Datasheet(PDF) - Atmel Corporation

Part Name

Description

Manufacturer

AT91SAM9G46B-CU

SMART ARM-based Embedded MPU

Atmel Corporation 

48.11 Touchscreen ADC (TSADC)

Table 48-21. Channel Conversion Time and ADC Clock

Parameter

Conditions

ADC Clock Frequency

10-bit resolution mode

Startup Time

Return from Idle Mode

Track and Hold Acquisition Time (TTH)

ADC Clock = 13.2 MHz(1)

Conversion Time (TCT)

ADC Clock = 13.2 MHz(1)

Throughput Rate

ADC Clock = 13.2 MHz(1)

Note: 1. The Track and Hold Acquisition Time is given by:

Min

Typ

Max

Unit

–

–

13.2

MHz

–

–

40

µs

0.5

–

–

µs

–

–

1.75

µs

–

–

440

ksps

TTH (ns) = 500 + (0.12 × ZIN)(Ω)

The ADC internal clock is divided by 2 in order to generate a clock with a duty cycle of 75%. So the maximum conversion

time is give by:

TCT ( µs )

=

-2----3--

fclk

(

MHz)

The full speed is obtained for an input source impedance of < 50 ohms maximum, or TTH = 500 ns.

To achieve optimal performance of the TSADC, the SHTIM field in TSADCC Mode Register is to be calculated according to

this Track and Hold Acquisition Time, also called Sampled and Hold Time.

Table 48-22. External Voltage Reference Input

Parameter

Conditions

TSADVREF Input Voltage Range

–

TSADVREF Average Current

–

Current Consumption on VDDANA

–

Min

Typ

Max

Unit

2.4

–

VDDANA

V

–

–

600

µA

–

–

300

µA

Table 48-23. Analog Inputs

Parameter

Input Voltage Range

Input Leakage Current

Input Capacitance

Input Source Impedance

Min

Typ

Max

Unit

0

–

ADVREF V

–

–

1

µA

–

7

10

pF

–

50

–

Ω

Table 48-24. Transfer Characteristics

Symbol Parameter

Resolution

INL

Integral Non-linearity

DNL

Differential Non-linearity

EO

Offset Error

EG

Gain Error

Min

Typ

Max

Unit

–

10

–

bit

–

–

±2

LSB

-0.9

–

+0.9

LSB

-1.5

0.5

±10

mV

–

–

±2

LSB

1222 SAM9G46 Series [DATASHEET]

Atmel-11028G-ATARM-SAM9G46-Datasheet_08-Dec-15

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