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STM8S003K3(2012) View Datasheet(PDF) - STMicroelectronics

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Description
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STM8S003K3 Datasheet PDF : 100 Pages
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Electrical characteristics
STM8S003K3 STM8S003F3
(1) Data based on characterization results, not tested in production.
(2) The physical granularity of the memory is 4 bytes, so cycling is performed on 4 bytes
even when a write/erase operation addresses a single byte.
9.3.6 I/O port pin characteristics
Symbol
VIL
VIH
Vhys
General characteristics
Subject to general operating conditions for VDD and TA unless otherwise specified. All unused
pins must be kept at a fixed voltage: using the output mode of the I/O for example or an
external pull-up or pull-down resistor.
Table 37: I/O static characteristics
Parameter
Conditions
Min Typ Max
Unit
Input low level voltage
VDD = 5 V
Input high level voltage
-0.3 V
0.7 x
VDD
0.3 x
VDD
V
VDD +
0.3
Hysteresis(1)
700
mV
Rpu
Pull-up resistor
VDD = 5 V, VIN = VSS 30
55 80
kΩ
tR, tF
Rise and fall time
(10 % - 90 %)
Fast I/Os
Load = 50 pF
Standard and high sink
I/Os
Load = 50 pF
20 (2)
ns
125 (2)
Ilkg
Digital input leakage current VSS ≤ VIN ≤VDD
±1 (2)
μA
Ilkg ana
Analog input leakage current VSS ≤ VIN ≤ VDD
±250 (2) nA
Ilkg(inj)
Leakage current in adjacent Injection current ±4 mA
I/O
±1 (2)
μA
(1) Hysteresis voltage between Schmitt trigger switching levels. Based on characterization results, not
tested in production.
(2)Data based on characterisation results, not tested in production.
66/100
DocID018576 Rev 3

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