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PIC32MX150F256HT-I/PT View Datasheet(PDF) - Microchip Technology

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Description
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PIC32MX150F256HT-I/PT Datasheet PDF : 382 Pages
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PIC32MX1XX/2XX/5XX 64/100-PIN FAMILY
REGISTER 23-2: C1CFG: CAN BAUD RATE CONFIGURATION REGISTER
Bit
Range
31:24
23:16
15:8
7:0
Bit
Bit
31/23/15/7 30/22/14/6
U-0
U-0
U-0
R/W-0
WAKFIL
R/W-0
SEG2PHTS(1)
R/W-0
SAM(2)
R/W-0
R/W-0
SJW<1:0>(3)
Bit
Bit
Bit
Bit
Bit
Bit
29/21/13/5 28/20/12/4 27/19/11/3 26/18/10/2 25/17/9/1 24/16/8/0
U-0
U-0
U-0
U-0
U-0
U-0
U-0
U-0
U-0
R/W-0
R/W-0
R/W-0
SEG2PH<2:0>(1,4)
R/W-0
R/W-0
R/W-0
SEG1PH<2:0>
R/W-0
R/W-0
R/W-0
PRSEG<2:0>
R/W-0
R/W-0
R/W-0
R/W-0
BRP<5:0>
R/W-0
R/W-0
Legend:
R = Readable bit
-n = Value at POR
HC = Hardware Clear
W = Writable bit
‘1’ = Bit is set
S = Settable bit
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 31-23 Unimplemented: Read as ‘0
bit 22 WAKFIL: CAN Bus Line Filter Enable bit
1 = Use CAN bus line filter for wake-up
0 = CAN bus line filter is not used for wake-up
bit 21-19 Unimplemented: Read as ‘0
bit 18-16 SEG2PH<2:0>: Phase Buffer Segment 2 bits(1,4)
111 = Length is 8 x TQ
000 = Length is 1 x TQ
bit 15 SEG2PHTS: Phase Segment 2 Time Select bit(1)
1 = Freely programmable
0 = Maximum of SEG1PH or Information Processing Time, whichever is greater
bit 14 SAM: Sample of the CAN Bus Line bit(2)
1 = Bus line is sampled three times at the sample point
0 = Bus line is sampled once at the sample point
bit 13-11 SEG1PH<2:0>: Phase Buffer Segment 1 bits(4)
111 = Length is 8 x TQ
000 = Length is 1 x TQ
Note 1:
2:
3:
4:
SEG2PH SEG1PH. If SEG2PHTS is clear, SEG2PH will be set automatically.
3 Time bit sampling is not allowed for BRP < 2.
SJW SEG2PH.
The Time Quanta per bit must be greater than 7 (that is, TQBIT > 7).
Note: This register can only be modified when the CAN module is in Configuration mode (OPMOD<2:0>
(C1CON<23:21>) = 100).
DS60001290E-page 248
2014-2017 Microchip Technology Inc.

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