PIC32MX1XX/2XX/5XX 64/100-PIN FAMILY
REGISTER 23-2: C1CFG: CAN BAUD RATE CONFIGURATION REGISTER (CONTINUED)
bit 10-8 PRSEG<2:0>: Propagation Time Segment bits(4)
111 = Length is 8 x TQ
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000 = Length is 1 x TQ
bit 7-6 SJW<1:0>: Synchronization Jump Width bits(3)
11 = Length is 4 x TQ
10 = Length is 3 x TQ
01 = Length is 2 x TQ
00 = Length is 1 x TQ
bit 5-0 BRP<5:0>: Baud Rate Prescaler bits
111111 = TQ = (2 x 64)/SYSCLK
111110 = TQ = (2 x 63)/SYSCLK
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000001 = TQ = (2 x 2)/SYSCLK
000000 = TQ = (2 x 1)/SYSCLK
Note 1:
2:
3:
4:
SEG2PH SEG1PH. If SEG2PHTS is clear, SEG2PH will be set automatically.
3 Time bit sampling is not allowed for BRP < 2.
SJW SEG2PH.
The Time Quanta per bit must be greater than 7 (that is, TQBIT > 7).
Note: This register can only be modified when the CAN module is in Configuration mode (OPMOD<2:0>
(C1CON<23:21>) = 100).
2014-2017 Microchip Technology Inc.
DS60001290E-page 249