STLC5460
MICROPROCESSOR INTERFACE TIMING
tx
Parameter
t1 Set up time Not Chip Select / DS/NRD
t2 Set up time R/W / NWR / DS/NRD
t3 Hold time Not Chip Select / DS/NRD
t4 Hold time R/W / NWR / DS/NRD
t5
Width AS/ALE
t6 Set up time Address / AS/ALE
t7 Hold time Address / AS/ALE
t8 Data valid after DS/NRD (rising edge) (30 pF)
t9 Hold time Data after DS/NRD (falling edge)
t10 Hold time Data / DS/NRD
t11 Set up time Data / DS/NRD
t12 Width DS/NRD
t13 NRDY/NWAIT delay DS/NRD
t14 NRDY/NWAIT delay / Data
t15 NRDY/NWAIT delay / DS/NRD
NRDY/NWAIT delay / R/W / NWR
T min
T max
Unit
10
ns
10
ns
0
ns
0
ns
20
ns
10
ns
10
ns
40
ns
0
ns
10
ns
10
ns
30
ns
30
ns
0
ns
30
ns
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