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AT90PWM2(2005) View Datasheet(PDF) - Atmel Corporation

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AT90PWM2 Datasheet PDF : 365 Pages
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Alternate Port Functions
Most port pins have alternate functions in addition to being general digital I/Os. Figure
28 shows how the port pin control signals from the simplified Figure 25 can be overrid-
den by alternate functions. The overriding signals may not be present in all port pins, but
the figure serves as a generic description applicable to all port pins in the AVR micro-
controller family.
Figure 28. Alternate Port Functions(1)
PUOExn
PUOVxn
1
0
PUD
DDOExn
DDOVxn
1
0
PVOExn
PVOVxn
QD
DDxn
Q CLR
RESET
WDx
RDx
1
Pxn
0
1
QD
0
PORTxn
DIEOExn
Q CLR
PTOExn
WPx
DIEOVxn
1
0
SLEEP
RESET
WRx
RRx
SYNCHRONIZER
D SET Q
L CLR Q
DQ
PINxn
CLR Q
RPx
clk I/O
DIxn
AIOxn
PUOExn: Pxn PULL-UP OVERRIDE ENABLE
PUOVxn: Pxn PULL-UP OVERRIDE VALUE
DDOExn: Pxn DATA DIRECTION OVERRIDE ENABLE
DDOVxn: Pxn DATA DIRECTION OVERRIDE VALUE
PVOExn: Pxn PORT VALUE OVERRIDE ENABLE
PVOVxn: Pxn PORT VALUE OVERRIDE VALUE
DIEOExn: Pxn DIGITAL INPUT-ENABLE OVERRIDE ENABLE
DIEOVxn: Pxn DIGITAL INPUT-ENABLE OVERRIDE VALUE
SLEEP: SLEEP CONTROL
PTOExn: Pxn, PORT TOGGLE OVERRIDE ENABLE
PUD: PULLUP DISABLE
WDx: WRITE DDRx
RDx: READ DDRx
RRx: READ PORTx REGISTER
WRx: WRITE PORTx
RPx: READ PORTx PIN
WPx: WRITE PINx
clkI/O: I/O CLOCK
DIxn: DIGITAL INPUT PIN n ON PORTx
AIOxn: ANALOG INPUT/OUTPUT PIN n ON PORTx
Note:
1. WRx, WPx, WDx, RRx, RPx, and RDx are common to all pins within the same port.
clkI/O, SLEEP, and PUD are common to all ports. All other signals are unique for each
pin.
Table 23 summarizes the function of the overriding signals. The pin and port indexes
from Figure 28 are not shown in the succeeding tables. The overriding signals are gen-
erated internally in the modules having the alternate function.
68 AT90PWM2/3
4317B–AVR–02/05

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