AT90PWM2/3/2B/3B
6.3.2 The EEPROM Address Registers – EEARH and EEARL
6.3.3
6.3.4
Bit
Read/Write
Initial Value
15
–
EEAR7
7
R
R/W
0
X
14
–
EEAR6
6
R
R/W
0
X
13
–
EEAR5
5
R
R/W
0
X
12
–
EEAR4
4
R
R/W
0
X
11
–
EEAR3
3
R
R/W
0
X
10
–
EEAR2
2
R
R/W
0
X
9
–
EEAR1
1
R
R/W
0
X
8
EEAR8
EEAR0
0
R/W
R/W
X
X
EEARH
EEARL
• Bits 15..9 – Reserved Bits
These bits are reserved bits in the AT90PWM2/2B/3/3B and will always read as zero.
• Bits 8..0 – EEAR8..0: EEPROM Address
The EEPROM Address Registers – EEARH and EEARL specify the EEPROM address in the
512 bytes EEPROM space. The EEPROM data bytes are addressed linearly between 0 and
511. The initial value of EEAR is undefined. A proper value must be written before the EEPROM
may be accessed.
The EEPROM Data Register – EEDR
Bit
Read/Write
Initial Value
7
EEDR7
R/W
0
6
EEDR6
R/W
0
5
EEDR5
R/W
0
4
EEDR4
R/W
0
3
EEDR3
R/W
0
2
EEDR2
R/W
0
1
EEDR1
R/W
0
0
EEDR0
R/W
0
EEDR
• Bits 7..0 – EEDR7.0: EEPROM Data
For the EEPROM write operation, the EEDR Register contains the data to be written to the
EEPROM in the address given by the EEAR Register. For the EEPROM read operation, the
EEDR contains the data read out from the EEPROM at the address given by EEAR.
The EEPROM Control Register – EECR
Bit
7
6
5
4
3
2
1
0
–
–
EEPM1 EEPM0 EERIE EEMWE EEWE EERE
EECR
Read/Write
R
R
R/W
R/W
R/W
R/W
R/W
R/W
Initial Value
0
0
X
X
0
0
X
0
• Bits 7..6 – Reserved Bits
These bits are reserved bits in the AT90PWM2/2B/3/3B and will always read as zero.
• Bits 5..4 – EEPM1 and EEPM0: EEPROM Programming Mode Bits
The EEPROM Programming mode bit setting defines which programming action that will be trig-
gered when writing EEWE. It is possible to program data in one atomic operation (erase the old
value and program the new value) or to split the Erase and Write operations in two different
operations. The Programming times for the different modes are shown in Table 6-1. While
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4317K–AVR–03/2013