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AT90PWM2B-16SU View Datasheet(PDF) - Atmel Corporation

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AT90PWM2B-16SU Datasheet PDF : 365 Pages
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AT90PWM2/3/2B/3B
Figure 7-2. Clock Distribution AT90PWM2B/3B
PSC0/1/2
General I/O
Modules
ADC
CPU Core
RAM
Flash and
EEPROM
CLKPLL
PLL
PLL Input
Multiplexer
clkI/O
clkADC
AVR Clock
Control Unit
clkCPU
clkFLASH
Reset Logic
Watchdog Timer
Source Clock
Clock
Multiplexer
Watchdog Clock
Watchdog
Oscillator
External Clock
(Crystal
Oscillator)
Calibrated RC
Oscillator
7.1.1
7.1.2
7.1.3
7.1.4
CPU Clock – clkCPU
The CPU clock is routed to parts of the system concerned with operation of the AVR core.
Examples of such modules are the General Purpose Register File, the Status Register and the
data memory holding the Stack Pointer. Halting the CPU clock inhibits the core from performing
general operations and calculations.
I/O Clock – clkI/O
The I/O clock is used by the majority of the I/O modules, like Timer/Counters, SPI, USART. The
I/O clock is also used by the External Interrupt module, but note that some external interrupts
are detected by asynchronous logic, allowing such interrupts to be detected even if the I/O clock
is halted.
Flash Clock – clkFLASH
The Flash clock controls operation of the Flash interface. The Flash clock is usually active simul-
taneously with the CPU clock.
PLL Clock – clkPLL
The PLL clock allows the PSC modules to be clocked directly from a 64/32 MHz clock. A 16 MHz
clock is also derived for the CPU.
30
4317K–AVR–03/2013

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