AT90PWM2B-16SU View Datasheet(PDF) - Atmel Corporation
Part Name
Description
Manufacturer
AT90PWM2B-16SU
Atmel Corporation
AT90PWM2B-16SU Datasheet PDF : 365 Pages
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AT90PWM2/3/2B/3B
• Bit 7 – AMP0EN: Amplifier 0 Enable Bit
Set this bit to enable the Amplifier 0.
Clear this bit to disable the Amplifier 0.
Clearing this bit while a conversion is running will take effect at the end of the conversion.
Warning: Always clear AMP0TS1:0 when clearing AMP0EN.
• Bit 6– AMP0IS: Amplifier 0 Input Shunt
Set this bit to short-circuit the Amplifier 0 input.
Clear this bit to normally use the Amplifier 0.
• Bit 5, 4– AMP0G1, 0: Amplifier 0 Gain Selection Bits
These 2 bits determine the gain of the amplifier 0.
The different setting are shown in Table 21-8.
Table 21-8.
AMP0G1
0
0
1
1
Amplifier 0 Gain Selection
AMP0G0 Description
0
Gain 5
1
Gain 10
0
Gain 20
1
Gain 40
To ensure an accurate result, after the gain value has been changed, the amplifier input needs
to have a quite stable input value during at least 4 Amplifier synchronization clock periods.
• Bit 1, 0– AMP0TS1, AMP0TS0: Amplifier 0 Trigger Source Selection Bits
In accordance with the Table 21-9, these 2 bits select the event which will generate the trigger
for the amplifier 0. This trigger source is necessary to start the conversion on the amplified
channel.
Table 21-9.
AMP0TS1
0
0
1
1
AMP0 Auto Trigger Source Selection
AMP0TS0
Description
0
Auto synchronization on ADC Clock/8
1
Trig on PSC0ASY
0
Trig on PSC1ASY
1
Trig on PSC2ASY
21.10.2
Amplifier 1Control and Status register – AMP1CSR
Bit
Read/Write
Initial Value
7
6
5
4
3
AMP1EN AMP1IS AMP1G1 AMP1G0
-
R/W
R/W
R/W
R/W
-
0
0
0
0
0
2
1
0
-
AMP1TS1 AMP1TS0 AMP1CSR
-
R/W
R/W
0
0
0
• Bit 7 – AMP1EN: Amplifier 1 Enable Bit
Set this bit to enable the Amplifier 1.
Clear this bit to disable the Amplifier 1.
Clearing this bit while a conversion is running will take effect at the end of the conversion.
Warning: Always clear AMP1TS1:0 when clearing AMP1EN.
4317K–AVR–03/2013
257
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