CSR8635 View Datasheet(PDF) - CSR plc
Part Name
Description
Manufacturer
CSR8635 Datasheet PDF : 105 Pages
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VBAT VBUS
VBAT
3V3_USB
1V8_SMPS
S1
MFB
C2
2u2
C1
2u2
C3
2u2
L1
C4
C5
4u7 2u2
10n
1V35_SMPS
C6
L2
C7
10n
4u7 4u7
C8
C9
15p
2u2
1V8_SMPS
C10
470n
C11
100n
XT1
, 2013 CHARGER
r 27 BYPASS REG
mbe 50R
te i
ANT
U2
2 OUT
IN 4
, Sep Bluetooth RF
3 GND GND 1
2.45GHz
50R
i
BT_RF
12 BT_RF
VBAT
1V8 SMPS
1V35 SMPS
3V3
PCB Layout Notes CSR8635 QFNFriday Ensure the following components are placed next to CSR8635 QFN
and have good low impedance connections both to signal and GND
- C2 and C3
.cn Ensure the following tracks have good low impedance connections
(no via share and short thick tracks)
m VSS_SMPS_1V8 to Battery Ground
o VSS_SMPS_1V35 to Battery Ground
t.c LX_1V8 to Inductor
LX_1V35 to Inductor
in L1 to C4 track
o L2 to C7 track
lp C4 to VSS_SMPS_1V8
ce C7 to VSS_SMPS_1V35
x VBAT to Battery and C2 - should be <1ohm from battery
e VCHG to charger connector and C1
- VDD_DIG to Ground
ou Ensure good low impedance ground return path through GND plane for SMPSU
h current from C4 to VSS_SMPS_1V8 and C7 to VSS_SMPS_1V35 back to C3 & C4
.z Ensure routing from L2 to pin 39 and from L2 to C8/9 & pins 11 & 13 are kept separate
n CSR recommend low Rdc inductors (<0.5R) for L1 & L2 for optimum power efficiency
ve For example Taiyo Yuden CB2012T4R7M
ke Suggest analogue and digital grounds are separated if possible
bo and star connected near VSS_AUDIO as shown
g Ensure analogue tracks stay over Analogue ground as much as possible
SP100
STAR
AUX LDO 1V35
ANA LDO 1V35
1V35
C12
2u2
XTAL_IN 19
26MHz
DIG LDO
XTAL_OUT 18
PIO[29] / LED[0]
PIO[30] / LED[1]
PIO[31] / LED[2]
37
36
66
PIO[0] / UART_RX
PIO[1] / UART_TX
PIO[6]
PIO[7]
PIO[8] / UART_RTS#
PIO[9] / UART_CTS#
PIO[18]
PIO[21]
59
60
62
57
61
58
65
64
LED_0
LED_1
LED_2
PIO_0
PIO_1
PIO_6
PIO_7
PIO_8
PIO_9
PIO_18
PIO_21
PPPIIOPOIOI[[O34[5][]2]//]/PP/PCCPCMMCM11M1__1_OS_CUYILNTNKC// /SS/SPPSPIIP__I_MMI_COICSLSSKOI#22338404
SPI_PCM# 29
PPIOIO[1[01]2P/]IOQ/ Q[S1SP1PI]_/IF_QFLPSALIAPSOSIH[_1H_I3OC_][CL/0KSQ] /#S/I2IP/2CII2C__CI_OS_SD[WC1A]LP32221562
PIO[14] / UART_RX
PIO[15] / UART_TX
PIO[16] / UART_RTS#
PIO[17] / UART_CTS#
23
21
27
32
AIO[0] 20
USB_P
USB_N
56
55
RST# 35
PIO_2
PIO_3
PIO_4
PIO_5
SPI_PCM#
PIO_12
PIO_10
PIO_11
PIO_13
PIO_14
PIO_15
PIO_16
PIO_17
AIO_0
USB_P
USB_N
RSTB
C13
C14
2u2
2u2
C15
C16
2u2
2u2
Line Inputs
Left
Right
Speakers (16-32 Ohm)
LED outputs
PIO / UART
PIO / PCM1 / Debug SPI / I2S
SPI/PCM# high for SPI. Low for all other functions
PIO / Serial Flash / I2C
PIO / UART
Analogue Input / Output
USB (12Mbps)
Reset
Optional Ancilliary Circuits d for qin Optional Fast charge
re 400mohm = 500mA
a VBUS
rep CHG_EXT 1
P VBAT_SENSE
Q100
BCX51
R104
1%
C105
4u7
R108
220mR
USB / Charger Interface
CON100
USB MINI-B
VBUS
D-
D+
ID
GND
1
2
3
4
5
VBUS
USB_N
USB_P
Lithium Polymer Battery
(battery protection built in)
VBAT
Li+ CELL
CON101
3.7V
Battery temperature sensor
1V35_SMPS
R100
AIO_0
9k1
PIO_n
THERM
10k
D Q1
G
S
C102
10n
VBAT VBUS
D100
BAT54C
Typical LED's and Buttons
1V8
1V8
1V8
1V8
1V8
D101 D102 D103
R101
220R
R102
330R
R103
330R
S100
F4
S101
F3
S102
F2
S103 S104
VOL+ VOL-
Optional I2C EEPROM memory
1V8_SMPS C100
R105 R106 R107
2k2 2k2 2k2
PIO_12
PIO_10
PIO_11
U101
8
7
6
5
VCC
WP
SCL
SDA
10n
A0
A1
A2
VSS
1
2
3
4
24AAxxx
Optional 1x SPI FLASH memory
1V8_SMPS
C101
10n
PIO_11
PIO_13
1V8_SMPS
U100
8 VDD
5
2
3
7
SI/SIO0 CE
SO/SIO1 SCK
WP/SIO2
HOLD/SIO3
VSS
1
6
4
PIO_12
PIO_10
VBAT
400mR
SPI Flash
Size of EEPROM depends on voice prompt requirements
Connect VBAT_SENSE to VBAT
if not using this circuit
Figure 12.2: Dual/Stereo Line Input
Production Information
© Cambridge Silicon Radio Limited 2013
Confidential Information - This Material is Subject to CSR's Non-disclosure Agreement
Page 69 of 105
CS-303725-DSP5
www.csr.com
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