M24C01-FDW6G View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

M24C01-FDW6G

1-Kbit and 2-Kbit serial I²C bus EEPROMs

STMicroelectronics 

M24C01/02-W M24C01/02-R M24C02-F

Instructions

5.2

Read operations

Read operations are performed independently of the state of the Write Control (WC) signal.

After the successful completion of a Read operation, the device internal address counter is

incremented by one, to point to the next byte address.

For the Read instructions, after each byte read (data out), the device waits for an

acknowledgment (data in) during the 9th bit time. If the bus master does not acknowledge

during this 9th time, the device terminates the data transfer and switches to its Standby

mode.

Current

Address

Read

Figure 8. Read mode sequences

ACK

NO ACK

Dev select

Data out

R/W

Random

Address

Read

ACK

ACK

ACK

NO ACK

Dev select * Byte address Dev select *

Data out

R/W

R/W

Sequential

Current

Read

Sequential

Random

Read

ACK

ACK

Dev select

Data out 1

R/W

ACK

NO ACK

Data out N

ACK

ACK

ACK

ACK

Dev select * Byte address Dev select *

Data out 1

R/W

R/W

ACK

NO ACK

Data out N

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