dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
REGISTER 15-19: PWMCAPx: PRIMARY PWMx TIME BASE CAPTURE REGISTER
R-0
R-0
R-0
R-0
R-0
R-0
R-0
PWMCAP<15:8>(1,2)
bit 15
R-0
bit 8
R-0
R-0
R-0
R-0
R-0
U-0
U-0
U-0
PWMCAP<7:3>(1,2)
—
—
—
bit 7
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-3
bit 2-0
PWMCAP<15:3>: Captured PWM Time Base Value bits(1,2)
The value in this register represents the captured PWM time base value when a leading edge is
detected on the current-limit input.
Unimplemented: Read as ‘0’
Note 1: The capture feature is only available on primary output (PWMxH).
2: This feature is active only after LEB processing on the current-limit input signal is complete.
DS70318D-page 216
Preliminary
© 2009 Microchip Technology Inc.