dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
REGISTER 19-5: ADCPC0: A/D CONVERT PAIR CONTROL REGISTER 0 (CONTINUED)
bit 7
IRQEN0: Interrupt Request Enable 0 bit
1 = Enable IRQ generation when requested conversion of channels AN1 and AN0 is completed
0 = IRQ is not generated
bit 6
PEND0: Pending Conversion Status 0 bit
1 = Conversion of channels AN1 and AN0 is pending; set when selected trigger is asserted
0 = Conversion is complete
bit 5
SWTRG0: Software Trigger 0 bit
1 = Start conversion of AN1 and AN0 (if selected by TRGSRC bits)(1)
This bit is automatically cleared by hardware when the PEND0 bit is set.
0 = Conversion is not started
bit 4-0
TRGSRC0<4:0>: Trigger 0 Source Selection bits
Selects trigger source for conversion of analog channels AN1 and AN0.
00000 = No conversion enabled
00001 = Individual software trigger selected
00010 = Global software trigger selected
00011 = PWM Special Event Trigger selected
00100 = PWM Generator 1 primary trigger selected
00101 = PWM Generator 2 primary trigger selected
00110 = PWM Generator 3 primary trigger selected
00111 = PWM Generator 4 primary trigger selected
01000 = Reserved
•
•
•
01100 = Timer1 period match
01101 = Reserved
01110 = PWM Generator 1 secondary trigger selected
01111 = PWM Generator 2 secondary trigger selected
10000 = PWM Generator 3 secondary trigger selected
10001 = PWM Generator 4 secondary trigger selected
10010 = Reserved
•
•
•
10110 = Reserved
10111 = PWM Generator 1 current-limit ADC trigger
11000 = PWM Generator 2 current-limit ADC trigger
11001 = PWM Generator 3 current-limit ADC trigger
11010 = PWM Generator 4 current-limit ADC trigger
11011 = Reserved
•
•
•
11111 = Timer2 period match
Note 1: If other conversions are in progress, then conversion will be performed when the conversion resources are
available.
DS70318D-page 250
Preliminary
© 2009 Microchip Technology Inc.