ST7PLITEU09M3TR View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST7PLITEU09M3TR

8-bit MCU with single voltage Flash memory, ADC, timers

STMicroelectronics 

ST7LITEU05 ST7LITEU09

13.10 10-BIT ADC CHARACTERISTICS

Subject to general operating condition for VDD, fOSC, and TA unless otherwise specified.

Symbol

Parameter

Conditions

Min

Typ 1)

Max

fADC ADC clock frequency 2)

4

VAIN Conversion voltage range

RAIN External input resistor

VSS

VDD = 5V, fADC=4MHz

VDD = 3.3V, fADC=4MHz

2.7V ≤ VDD ≤5.5V, fADC=2MHz

2.4V ≤ VDD ≤2.7V, fADC=1MHz

VDD

8k 3)

7k 3)

10k 3)

20k 3)

CADC Internal sample and hold capacitor

3

tSTAB Stabilization time after ADC enable

0 4)

Conversion time (Sample+Hold)

tADC - Sample capacitor loading time

fCPU=8MHz, fADC=4MHz

3.5

4

- Hold conversion time

10

Unit

MHz

V

Ω

pF

µs

1/fADC

Notes:

1. Unless otherwise specified, typical data are based on TA=25°C and VDD-VSS=5V. They are given only as design guide-

lines and are not tested.

2. The maximum ADC clock frequency allowed within VDD = 2.4V to 2.7V operating range is 1MHz.

3. Any added external serial resistor will downgrade the ADC accuracy (especially for resistance greater than the maxi-

mum value). Data guaranteed by Design, not tested in production.

4. The stabilization time of the A/D converter is masked by the first tLOAD. The first conversion after the enable is then

always valid.

Figure 68. Typical Application with ADC

VDD

VAIN

RAIN

AINx

VT

0.6V

VT

0.6V

IL

±1µA

10-Bit A/D

Conversion

CADC

ST7LITEU0x

98/115

1

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