Electrical characteristics
STM32F100xC, STM32F100xD, STM32F100xE
Figure 21. Synchronous non-multiplexed NOR/PSRAM read timings
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Table 36. Synchronous non-multiplexed NOR/PSRAM read timings(1)(2)
Symbol
Parameter
Min
Max
tw(CLK)
FSMC_CLK period
27.7
td(CLKL-NExL)
FSMC_CLK low to FSMC_NEx low (x = 0...2)
1.5
td(CLKL-NExH) FSMC_CLK low to FSMC_NEx high (x = 0...2) 2
td(CLKL-NADVL) FSMC_CLK low to FSMC_NADV low
4
td(CLKL-NADVH) FSMC_CLK low to FSMC_NADV high
5
td(CLKL-AV)
FSMC_CLK low to FSMC_Ax valid (x = 0...25)
0
td(CLKL-AIV)
FSMC_CLK low to FSMC_Ax invalid (x = 0...25) 4
td(CLKH-NOEL) FSMC_CLK high to FSMC_NOE low
1.5
td(CLKL-NOEH) FSMC_CLK low to FSMC_NOE high
1.5
tsu(DV-CLKH)
FSMC_D[15:0] valid data before FSMC_CLK high 6.5
th(CLKH-DV)
FSMC_D[15:0] valid data after FSMC_CLK high 7
tsu(NWAITV-CLKH) FSMC_NWAIT valid before FSMC_SMCLK high 7
th(CLKH-NWAITV) FSMC_NWAIT valid after FSMC_CLK high
2
1. CL = 15 pF.
2. Preliminary values.
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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Doc ID 15081 Rev 7