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ST7PLIT115BF1M3 View Datasheet(PDF) - STMicroelectronics

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ST7PLIT115BF1M3 Datasheet PDF : 159 Pages
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ST7LITE1xB
I/O PORT PIN CHARACTERISTICS (Cont’d)
13.8.2 Output Driving Current
Subject to general operating conditions for VDD, fCPU, and TA unless otherwise specified.
Symbol
Parameter
Conditions
Min
Max Unit
Output low level voltage for a standard I/O pin
IIO=+5mA TA125°C
1.0
when 8 pins are sunk at same time
VOL 1)
(see Figure 83)
Output low level voltage for a high sink I/O pin
IIO=+2mA TA125°C
IIO=+20mA,TA125°C
0.4
1.3
when 4 pins are sunk at same time
(see Figure 89)
IIO=+8mA TA125°C
0.75
VOH 2)
Output high level voltage for an I/O pin
when 4 pins are sourced at same time
(see Figure 95)
IIO=-5mA, TA125°C VDD-1.5
IIO=-2mA TA125°C VDD-0.8
VOL 1)3)
Output low level voltage for a standard I/O pin
when 8 pins are sunk at same time
(see Figure 82)
Output low level voltage for a high sink I/O pin
when 4 pins are sunk at same time
IIO=+2mA TA125°C
IIO=+8mA TA125°C
0.5
V
0.5
VOH 2)3)
Output high level voltage for an I/O pin
when 4 pins are sourced at same time (Figure 94)
IIO=-2mA TA125°C VDD-0.8
Output low level voltage for a standard I/O pin
when 8 pins are sunk at same time
VOL 1)3) (see Figure 87)
IIO=+2mA TA125°C
0.6
Output low level voltage for a high sink I/O pin
when 4 pins are sunk at same time
IIO=+8mA TA125°C
0.6
Output high level voltage for an I/O pin
VOH 2)3) when 4 pins are sourced at same time
(see Figure 101)
IIO=-2mA TA125°C VDD-0.9
Notes:
1. The IIO current sunk must always respect the absolute maximum rating specified in Section 13.2.2 and the sum of IIO
(I/O ports and control pins) must not exceed IVSS.
2. The IIO current sourced must always respect the absolute maximum rating specified in Section 13.2.2 and the sum of
IIO (I/O ports and control pins) must not exceed IVDD.
3. Not tested in production, based on characterization results.
130/159

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