ST7PLIT115BF1M3 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
ST7PLIT115BF1M3
STMicroelectronics
ST7PLIT115BF1M3 Datasheet PDF : 159 Pages
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ST7LITE1xB
ST7LITE1xB FASTROM microcontroller option list
Customer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Address
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Contact
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Phone No . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Reference/FASTROM Code*: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
*FASTROM code name is assigned by STMicroelectronics.
FASTROM code must be sent in .S19 format. .Hex extension cannot be processed.
Device Type/Memory Size/Package (check only one option):
--------------------------------- | ----------------------------------------- | ----------------------------------------- |
F--A--S--T--R--O--M----D--E--V--I-C--E--:------ | -------------------2--K-------------------- | -------------------4--K-------------------- |
VFQFPN20: | [ ] ST7PLIT19BF0Ux
| [ ] ST7PLIT19BF1Ux
|
SO20:
| [ ] ST7PLIT19BF0Mx
| [ ] ST7PLIT19BF1Mx
|
PDIP20:
| [ ] ST7PLIT19BF0Bx
| [ ] ST7PLIT19BF1Bx
|
SO16:
| [ ] ST7PLIT19BY0Mx
| [ ] ST7PLIT19BY1Mx
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PDIP16:
| [ ] ST7PLIT19BY0Bx
| [ ] ST7PLIT19BY1Bx
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Warning: Addresses DEE0h, DEE1h, DEE2h and DEE3h are reserved areas for ST to program RCCR0
and RCCR1 (see section 7.1 on page 23).
Conditioning (check only one option, do not specify for DIP package) :
VFQFPN
[ ] Tape & Reel
[ ] Tray
SO
[ ] Tape & Reel
[ ] Tube
Special marking:
[ ] No
[ ] Yes "_ _ _ _ _ _ _ _ "
Authorized characters are letters, digits, '.', '-', '/' and spaces only.
Maximum character count: 8 char. max _ _ _ _ _ _ _ _
Temperature range:
[ ] -40°C to +85°C
[ ] -40°C to +125°C
Watchdog selection (WDG_SW):
[ ] Software activation
[ ] Hardware activation
Watchdog reset on Halt (WDG_HALT): [ ] Reset
[ ] No Reset
LVD reset (LVD):
[ ] Disabled
[ ] Enabled
[ ] Highest threshold
[ ] Medium threshold
[ ] Lowest threshold
Sector 0 size (SEC):
[ ] 0.5K
[ ] 1K
[ ] 2K
Readout protection (FMP_R): [ ] Disabled
Flash write protection (FMP_W): [ ] Disabled
[ ] Enabled
[ ] Enabled
RC oscillator (OSC) :
Clock source selection (CKSEL):
(if OSC disabled)
[ ] Disabled
[ ] Enabled
[ ] External crystal / ceramic resonator:
[ ] External Clock on PB4
[ ] External Clock on PC0
[ ] 4K
PLL (PLLOFF):
[ ] Disabled
[ ] Enabled
PLL factor (PLLx4x8):
[ ] PLLx4
[ ] PLLx8
PLL32 (PLL32OFF):
[ ] Disabled
[ ] Enabled
Comments : . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Supply operating range in the application : . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Notes
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Date :
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Signature : . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Important note : Not all configurations are available. See Table 27 on page 150 for authorized option byte
combinations.
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