ST7LITE1xB
DUAL 12-BIT AUTORELOAD TIMER 4 (Cont’d)
Figure 36. Dual Timer Mode (ENCNTR2=1)
ATIC
LTIC
Edge Detection Circuit
12-bit Input Capture
Output Compare
CMP
Interrupt
12-Bit Autoreload Register 1
12-Bit Upcounter 1
12-Bit Upcounter 2
12-Bit Autoreload Register 2
Clock
Control
OFF
fCPU
32MHz
1 ms from
Lite Timer
PWM0 Duty Cycle Generator
PWM1 Duty Cycle Generator
Dead Time
Generator
OE0
OE1
OVF1 interrupt
OVF2 interrupt
PWM2 Duty Cycle Generator
PWM3 Duty Cycle Generator
DTE bit
One Pulse
mode
OE2
OE3
PWM0
PWM1
PWM2
PWM3
Output Compare
OP_EN bit
CMP Interrupt
BPEN bit
58/159
1