DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

M41ST84W View Datasheet(PDF) - STMicroelectronics

Part Name
Description
Manufacturer
M41ST84W Datasheet PDF : 34 Pages
First Prev 21 22 23 24 25 26 27 28 29 30 Next Last
M41ST84W
Clock operation
3.10
Century bit
Bits D7 and D6 of clock register 03h contain the CENTURY ENABLE bit (CEB) and the
CENTURY bit (CB). Setting CEB to a “1” will cause CB to toggle, either from a “0” to “1” or
from “1” to “0” at the turn of the century (depending upon its initial state). If CEB is set to a
“0”, CB will not toggle.
3.11
Note:
Output driver pin
When the FT bit, AFE bit and watchdog register are not set, the IRQ/FT/OUT pin becomes
an output driver that reflects the contents of D7 of the control register. In other words, when
D7 (OUT bit) and D6 (FT bit) of address location 08h are a '0,' then the IRQ/FT/OUT pin will
be driven low.
The IRQ/FT/OUT pin is an open drain which requires an external pull-up resistor.
3.12
Battery low warning
The M41ST84W automatically performs battery voltage monitoring upon power-up and at
factory-programmed time intervals of approximately 24 hours. The battery low (BL) bit, bit
D4 of flags register 0Fh, will be asserted if the battery voltage is found to be less than
approximately 2.5 V. The BL bit will remain asserted until completion of battery replacement
and subsequent battery low monitoring tests, either during the next power-up sequence or
the next scheduled 24-hour interval.
If a battery low is generated during a power-up sequence, this indicates that the battery is
below approximately 2.5 volts and may not be able to maintain data integrity in the SRAM.
Data should be considered suspect and verified as correct. A fresh battery should be
installed.
If a battery low indication is generated during the 24-hour interval check, this indicates that
the battery is near end of life. However, data is not compromised due to the fact that a
nominal VCC is supplied. In order to insure data integrity during subsequent periods of
battery backup mode, the battery should be replaced. The battery may be replaced while
VCC is applied to the device.
The M41ST84W only monitors the battery when a nominal VCC is applied to the device.
Thus applications which require extensive durations in the battery backup mode should be
powered-up periodically (at least once every few months) in order for this technique to be
beneficial. Additionally, if a battery low is indicated, data integrity should be verified upon
power-up via a checksum or other technique.
3.13
trec bit
Bit D7 of clock register 04h contains the trec bit (TR). trec refers to the automatic continuation
of the deselect time after VCC reaches VPFD. This allows for a voltage setting time before
WRITEs may again be performed to the device after a power-down condition. The trec bit will
allow the user to set the length of this deselect time as defined by Table 7 on page 26.
25/34

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]