Clock operation
M41ST84W
3.14
Initial power-on defaults
Upon initial application of power to the device, the following register bits are set to a '0' state:
watchdog register, TR, FT, AFE, ABE, and SQWE. The following bits are set to a '1' state:
ST, OUT, and HT (see Table 8 on page 26).
Table 7. trec definitions
tREC bit (TR)
STOP bit (ST)
0
0
0
1
1
X
1. Default setting
trec time
Min
Max
96
98
40
200(1)
50
2000
Units
ms
ms
µs
Table 8. Default values
Condition
TR
ST
HT Out
FT
AFE
ABE
SQWE
WATCHDOG
register(1)
Initial power-up
(battery attach)(2)
0
1
1
1
0
0
0
0
0
Subsequent power-up (with battery
backup)(3)
UC
UC
1
UC
0
0
0
0
0
1. WDS, BMB0-BMB4, RB0, RB1.
2. State of other control bits undefined.
3. UC = Unchanged
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