DSPIC33EV64GM102-I/SO View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

DSPIC33EV64GM102-I/SO

16-Bit, 5V Digital Signal Controllers with PWM, SENT, Op Amps and Advanced Analog Features

Microchip Technology 

dsPIC33EVXXXGM00X/10X FAMILY

TABLE 1-1: PINOUT I/O DESCRIPTIONS (CONTINUED)

Pin Name

Pin

Type

Buffer

Type

PPS

Description

SCK2

SDI2

SDO2

SS2

I/O ST Yes Synchronous serial clock input/output for SPI2.

I

ST Yes SPI2 data in.

O

— Yes SPI2 data out.

I/O ST Yes SPI2 slave synchronization or frame pulse I/O.

SCL1

SDA1

ASCL1

ASDA1

I/O ST No Synchronous serial clock input/output for I2C1.

I/O ST No Synchronous serial data input/output for I2C1.

I/O ST No Alternate synchronous serial clock input/output for I2C1.

I/O ST No Alternate synchronous serial data input/output for I2C1.

C1RX

C1TX

I

ST Yes CAN1 bus receive pin.

O

— Yes CAN1 bus transmit pin.

SENT1TX

SENT1RX

SENT2TX

SENT2RX

O

— Yes SENT1 transmit pin.

I

— Yes SENT1 receive pin.

O

— Yes SENT2 transmit pin.

I

— Yes SENT2 receive pin.

CVREF

O Analog No Comparator Voltage Reference output.

C1IN1+, C1IN2-,

C1IN1-, C1IN3-

C1OUT

I Analog No Comparator 1 inputs.

O

— Yes Comparator 1 output.

C2IN1+, C2IN2-,

C2IN1-, C2IN3-

C2OUT

I Analog No Comparator 2 inputs.

O

— Yes Comparator 2 output.

C3IN1+, C3IN2-,

C2IN1-, C3IN3-

C3OUT

I Analog No Comparator 3 inputs.

O

— Yes Comparator 3 output.

C4IN1+, C4IN2-,

C4IN1-, C4IN3-

C4OUT

I Analog No Comparator 4 inputs.

O

— Yes Comparator 4 output.

C5IN1+, C5IN2-,

C5IN1-, C5IN3-

C5OUT

I Analog No Comparator 5 inputs.

O

— Yes Comparator 5 output.

FLT1-FLT2

FLT3-FLT8

FLT32

DTCMP1-DTCMP3

PWM1L-PWM3L

PWM1H-PWM3H

SYNCI1

SYNCO1

I

ST Yes PWM Fault Inputs 1 and 2.

I

ST NO PWM Fault Inputs 3 to 8.

I

ST NO PWM Fault Input 32.

I

ST Yes PWM Dead-Time Compensation Inputs 1 to 3.

O

— No PWM Low Outputs 1 to 3.

O

— No PWM High Outputs 1 to 3.

I

ST Yes PWM Synchronization Input 1.

O

— Yes PWM Synchronization Output 1.

PGED1

PGEC1

PGED2

PGEC2

PGED3

PGEC3

I/O ST No Data I/O pin for Programming/Debugging Communication Channel 1.

I

ST No Clock input pin for Programming/Debugging Communication Channel 1.

I/O ST No Data I/O pin for Programming/Debugging Communication Channel 2.

I

ST No Clock input pin for Programming/Debugging Communication Channel 2.

I/O ST No Data I/O pin for Programming/Debugging Communication Channel 3.

I

ST No Clock input pin for Programming/Debugging Communication Channel 3.

MCLR

I/P ST No Master Clear (Reset) input. This pin is an active-low Reset to the

device.

Legend: CMOS = CMOS compatible input or output

ST = Schmitt Trigger input with CMOS levels

PPS = Peripheral Pin Select

Analog = Analog input

O = Output

TTL = TTL input buffer

P = Power

I = Input

 2013-2016 Microchip Technology Inc.

DS70005144E-page 15

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