ST7262
12.8 I/O PORT PIN CHARACTERISTICS
12.8.1 General Characteristics
Subject to general operating conditions for VDD, fCPU, and TA unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ 1)
Max
Unit
VIL Input low level voltage
VIH Input high level voltage
VIN Input voltage
True Open Drain I/O pins
Other I/O pins
0.7xVDD
VSS
Vhys Schmitt trigger voltage hysteresis
400
IL
Input leakage current
VSS≤VIN≤VDD
IS
Static current consumption 2)
Floating input mode
RPU Weak pull-up equivalent resistor 3) VIN=VSS
VDD=5V
50
80
CIO I/O pin capacitance
5
tf(IO)out Output high to low level fall time
CL=50pF
25
tr(IO)out Output low to high level rise time Between 10% and 90%
25
tw(IT)in External interrupt pulse time 4)
1
0.3xVDD
6.0
VDD
±1
200
150
V
V
mV
µA
kΩ
pF
ns
tCPU
Figure 68. Two typical Applications with unused I/O Pin
VDD
10kΩ
ST72XXX
UNUSED I/O PORT
10kΩ
UNUSED I/O PORT
ST72XXX
Figure 69. Typical IPU vs. VDD with VIN=VSS
0.0
-10.0
-20.0
-30.0
-40.0
-50.0
-60.0
-70.0
-80.0
-90.0
3.0 3.5 4.0 4.5 5.0 5.5 6.0
Vdd (V)
Figure 70. Typical RPU vs. VDD with VIN=VSS
180
160
140
120
100
80
60
40
20
0
3.0
3.5
4.0
4.5
5.0
5.5
6.0
Vdd (V)
Notes:
1. Unless otherwise specified, typical data are based on TA=25°C and VDD=5V, not tested in production.
2. Configuration not recommended, all unused pins must be kept at a fixed voltage: using the output mode of the I/O for
example or an external pull-up or pull-down resistor (see Figure 68). Data based on design simulation and/or technology
characteristics, not tested in production.
3. The RPU pull-up equivalent resistor is based on a resistive transistor (corresponding IPU current characteristics de-
scribed in Figure 69). This data is based on characterization results.
4. To generate an external interrupt, a minimum pulse width has to be applied on an I/O port pin configured as an external
interrupt source.
111/132