ST72622L2M1L View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
ST72622L2M1L
STMicroelectronics
ST72622L2M1L Datasheet PDF : 133 Pages
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ST7262
I/O PORT PIN CHARACTERISTICS (Cont’d)
Figure 78. Typical VDD-VOH vs. VDD (high sink port)
0.09
0.08
0.07
0.06
0.05
0.04
0.03
0.02
0.01
0
3.5
4
4.5
5
5.5
6
Vdd (V)
0.25
0.2
0.15
0.1
0.05
0
3.5
4
4.5
5
5.5
6
Vdd (V)
12.9 CONTROL PIN CHARACTERISTICS
12.9.1 Asynchronous RESET Pin
Subject to general operating conditions for VDD, fCPÜ, and TA unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ 1)
Max
Unit
VIH
VIL
Vhys
VOL
RON
Input High Level Voltage
Input Low Voltage
Schmitt trigger voltage hysteresis 3)
Output low level voltage 4)
(see Figure 80, Figure 81)
Weak pull-up equivalent resistor 5)
tw(RSTL)out Generated reset pulse duration
th(RSTL)in External reset pulse hold time 6)
0.7xVDD
VSS
400
VDD=5V
IIO=5mA
IIO=2mA
VIN=VSS
80
160
External pin or
6
internal reset sources
30
10
VDD
V
0.3xVDD
V
mV
1
V
0.4
280
kΩ
1/fSFOSC
µs
µs
Notes:
1. Unless otherwise specified, typical data are based on TA=25°C and VDD=5V, not tested in production.
2. Data based on characterization results, not tested in production.
3. Hysteresis voltage between Schmitt trigger switching levels. Based on characterization results, not tested.
4. The IIO current sunk must always respect the absolute maximum rating specified in Section 12.2 and the sum of IIO (I/
O ports and control pins) must not exceed IVSS.
5. The RON pull-up equivalent resistor is based on a resistive transistor (corresponding ION current characteristics de-
scribed in Figure 79). This data is based on characterization results, not tested in production.
6. To guarantee the reset of the device, a minimum pulse has to be applied to RESET pin. All short pulses applied on
RESET pin with a duration below th(RSTL)in can be ignored.
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