S25FL256SDPMFVC03 View Datasheet(PDF) - Cypress Semiconductor

Part Name

Description

Manufacturer

S25FL256SDPMFVC03

128 Mbit (16 Mbyte), 256 Mbit (32 Mbyte) 3.0V SPI Flash Memory

Cypress Semiconductor 

S25FL128S, S25FL256S

At any point after the first data byte is transferred, when CS# returns high, the SPI device will reset to standard SPI mode; able

to accept normal command operations.

– A minimum of one byte must be transferred.

– AutoBoot mode will not initiate again until another power cycle or a reset occurs.

An AutoBoot Enable bit (ABE) is set to enable the AutoBoot feature.

The AutoBoot register bits are non-volatile and provide:

The starting address (512-byte boundary), set by the AutoBoot Start Address (ABSA). The size of the ABSA field is 23 bits for

devices up to 32-Gbit.

The number of initial delay cycles, set by the AutoBoot Start Delay (ABSD) 8-bit count value.

The AutoBoot Enable.

If the configuration register QUAD bit CR1[1] is set to 1, the boot code will be provided 4 bits per cycle in the same manner as a

Read Quad Out command. If the QUAD bit is 0 the code is delivered serially in the same manner as a Read command.

Figure 9.15 AutoBoot Sequence (CR1[1]=0)

CS#

SCK

SI

SO

0 - - - - - - n n+1 n+2 n+3 n+4 n+5 n+6 n+7 n+8 n+9

Wait State

tWS

Don’t Care or High Impedance

High Impedance

76

MSB

DATA OUT 1

54321

DATA OUT 2

07

MSB

CS#

SCK

IO0

IO1

IO2

IO3

Figure 9.16 AutoBoot Sequence (CR1[1]=1)

0 - - - - - - n n+1 n+2 n+3 n+4 n+5 n+6 n+7 n+8 n+9

Wait State

tWS

High Impedance

High Impedance

High Impedance

High Impedance

404040404

DATA OUT 1

515151515

626262626

737373737

MSB

Document Number: 001-98283 Rev. *I

Page 79 of 144

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