Electrical characteristics
This table defines the transmitter DC specifications for serial RapidIO operating at 2.5
and 3.125 GBaud.
Table 74. Serial RapidIO transmitter DC timing specifications-2.5 GBaud, 3.125 GBaud2
Parameter
Symbol Min
Output voltage
VO
-0.40
Long-run differential output voltage VDIFFPP 800
Short-run differential output voltage VDIFFPP 500
DC Differential transmitter impedance ZTX-DIFF-DC 80
Typ
-
-
-
100
Max
2.30
1600
1000
120
Unit
V
mV p-p
mV p-p
Ω
Notes:
1. Voltage relative to COMMON of either signal comprising a differential pair
2. For recommended operating conditions, see Table 3.
Notes
1
-
-
Transmitter DC differential
impedance
This table defines the transmitter DC specifications for serial RapidIO operating at 5
GBaud.
Table 75. Serial RapidIO transmitter DC timing specifications-5 GBaud1
Parameter
Symbol
Long-run differential output voltage
VDIFF
Short-run differential output voltage
VDIFF
Long-run de-emphasized differential output voltage (ratio) VTX-DE-RATIO-3.5dB
Min
800
400
3
Typ
-
-
3.5
Max
1200
750
4
Unit
mV
mV
dB
Notes
-
-
-
Long-run de-emphasized differential output voltage (ratio) VTX-DE-RATIO-6.0dB 5.5
6.0
6.5
dB
-
Differential resistance
TRD
80
100
120
Ω
-
Notes:
1. For recommended operating conditions, see Table 3.
3.19.5.4.2 DC serial RapidIO receiver specifications
LP-Serial receiver electrical and timing specifications are stated in the text and tables of
this section.
Receiver input impedance results in a differential return loss better than 10 dB and a
common mode return loss better than 6 dB from 100 MHz to (0.8) x (Baud Frequency).
This includes contributions from on-chip circuitry, the chip package, and any off-chip
components related to the receiver. AC coupling components are included in this
requirement. The reference impedance for return loss measurements is 100-Ω resistive for
differential return loss and 25-Ω resistive for common mode.
This table defines the receiver DC specifications for serial RapidIO operating at 2.5 and
3.125 GBaud.
QorIQ T2080 Data Sheet, Rev. 3, 03/2018
NXP Semiconductors
121